Design of high-efficiency Hybrid Power Amplifier with concurrent F&F−1 class operations for 5G application

Frequenz ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Meisam Tahmasbi ◽  
Farhad Razaghian ◽  
Sobhan Roshani
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
New Method ◽  
Power Added Efficiency ◽  
Hybrid Power ◽  
Novel Structure ◽  
Mode A

Abstract This paper presents a novel structure of Hybrid Power Amplifier (HPA) to operate in two arbitrary classes of operation at two desirable frequencies. The proposed HPA is designed in concurrent F&F−1 classes, simultaneously for 5G application. Presented HPA can solve the harmonics interference problem for concurrent F and F−1 classes and also for any arbitrary class of operation in desired frequencies. The designed HPA operates at 1.5 GHz frequency in the F class mode, while operates at 2.1 GHz frequency in the F−1 class mode. A new method is presented by using two diplexers to provide two paths for signal in different frequencies. Two parallel paths are used at the output of the HPA circuit, so the proposed HPA can operate at two classes. Two diplexers are used in the HPA to make proper isolation between the designed paths. In design of the proposed HPA, according to the utilized diplexers, the amplifier can operate between two arbitrary classes of operation at desired frequencies without any specific switch. The measured drain efficiency (DE) and power added efficiency (PAE) parameters are 57 and 51%, respectively at 2.1 GHz, while measured DE and PAE are 64 and 54%, respectively at 1.5 GHz.

scholarly journals A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

Electronics ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 69 ◽  
Author(s):  
Taufiq Alif Kurniawan ◽  
Toshihiko Yoshimasu
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Low Voltage ◽  
Supply Voltage ◽  
Drain Current ◽  
Cmos Technology ◽  
Back Gate ◽  
Third Harmonic ◽  
Power Added Efficiency ◽  
Switching Transistor

This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parallel to the output load. Therefore, the flattened drain current and voltage waveforms are generated, which in turn reduce the overlapping and the dc power consumption significantly. In addition, a 0.5-V back-gate voltage is applied to the primary switching transistor to realize the low-voltage operation. At 1 V of supply voltage, the proposed PA has achieved a power added efficiency (PAE) of 34.5% and a saturated output power of 10.1 dBm.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

scholarly journals A Power Amplifier with Large High-Efficiency Range for 5G Communication

Sensors ◽  
2020 ◽  
Vol 20 (19) ◽  
pp. 5581
Author(s):  
Zhiwei Zhang ◽  
Zhiqun Cheng ◽  
Guohua Liu
Keyword(s):  
Output Power ◽  
Design Process ◽  
Power Amplifier ◽  
High Efficiency ◽  
New Method ◽  
Saturated Output Power ◽  
Doherty Power Amplifier ◽  
5G Communication

This paper presents a new method to design a Doherty power amplifier (DPA) with a large, high-efficiency range for 5G communication. This is through analyzing the drain-to-source capacitance (CDS) of DPAs, and adopting appropriate impedance of the peak device. A closed design process is proposed, to design the extended efficiency range DPA based on derived theories. For validation, a DPA with large efficiency range was designed and fabricated by using two equal devices. The measured results showed that the saturated output power was between 43.4 dBm and 43.7 dBm in the target band. Around 70% saturated drain efficiency is obtained with a gain of greater than 11 dB. Moreover, the obtained drain efficiency is larger than 50% at the 10 dB power back-off, when operating at 3.5 GHz. These superior performances illustrate that the implemented DPA can be applied well in 5G communication.

scholarly journals X-Band High-Efficiency Continuous Class B Power Amplifier GaN MMIC Assisted by Input Second-Harmonic Tuning

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1312 ◽  
Author(s):  
Chen Jin ◽  
Yuan Gao ◽  
Wei Chen ◽  
Jianhua Huang ◽  
Zhiyu Wang ◽  
...  
Keyword(s):  
Power Amplifier ◽  
Integrated Circuit ◽  
High Efficiency ◽  
Second Harmonic ◽  
Power Added Efficiency ◽  
Optimum Load ◽  
Measurement Results ◽  
Class B ◽  
Point To Point ◽  
Output Capacitance

This paper presents a high-efficiency continuous class B power amplifier MMIC (Monolithic Microwave Integrated Circuit) from 8 GHz to 10.5 GHz, fabricated with 0.25 μm GaN-on-SiC technology. The Pedro load-line method was performed to calculate the optimum load of the GaN field-effect transistor (FET) for efficiency enhancement. Optimized by an output second-harmonic tuned network, fundamental to second-harmonic impedance, mapping was established point-to-point within a broad frequency band, which approached the classic continuous class B mode with an expanded high-efficiency bandwidth. Moreover, the contribution to the output capacitance of the FET was introduced into the output second-harmonic tuned network, which simplified the structure of the output matching network. Assisted by the second-harmonic source-pull technique, the input second-harmonic tuned network was optimized to improve the efficiency of the power amplifier over the operation band. The measurement results showed 51–59% PAE (Power Added Efficiency) and 19.8–21.2 dB power gain with a saturated power of 40.8–42.2 dBm from 8 GHz to 10.5 GHz. The size of the chip was 3.2 × 2.4 mm2.

scholarly journals Design of Class F Power Amplifier for 2.4ghz using Third Harmonics

2019 ◽  
Vol 8 (3) ◽  
pp. 7370-7375
Keyword(s):  
Power Amplifier ◽  
Large Scale ◽  
High Efficiency ◽  
Supply Voltage ◽  
Travelling Wave ◽  
Input Power ◽  
Engineering Research ◽  
Power Added Efficiency ◽  
Amplification Process ◽  
Class F

Historically, travelling wave tube amplifier (TWTA) has been a common type of Microwave amplifier used commonly in terrestrial and space application due to their high efficiency and power handling capacity. However due to their bulky nature and also being very expensive, it is difficult to use them commercially in a large scale. Inspired by the advantage such as very less development cost, minimum supply voltage, gradual degradation and numerous commercial applications, Solid State Power Amplifier (SSPA) has been the replacement to vacuum tube Technology. The efficiency of the amplifier is one of the most important task in the microwave engineering research. An important figure of merit, power-added efficiency (PAE), is the main focus. Hence in this paper, class F Power amplifier is designed for 2.4GHz frequency. Class F Amplifier is also called as wave shaping amplifier since the harmonics generated helps the amplification process. The class f PA is biased nearer to the class B amplifier (close cut-off area) so the transistor can move back and forth rapidly to produce the harmonics. The efficiency of class F amplifier depends on how many harmonics are used for the amplification process. Here, the amplification process is performed up to the third harmonics which provides 41.606 dBm output power with 27dBm input power. Also a gain of more than 20.277dBm is achieved when the input given is 27dBm. Several other results like reflection Coefficient and transmission coefficient simulations has also been provided with the power added efficiency (PAE) of 75.402 achieved has also been simulated.

scholarly journals An enhanced broadband class-J mode power amplifier for 5G smart meter applications

F1000Research ◽  
2021 ◽  
Vol 10 ◽  
pp. 1099
Author(s):  
Nagisetty Sridhar ◽  
Dr Chinnaiyan Senthilpari ◽  
Dr Mardeni R ◽  
Dr Wong Hin Yong
Keyword(s):  
Power Amplifier ◽  
Smart Grids ◽  
High Efficiency ◽  
Fine Tuning ◽  
Smart Meter ◽  
Smart Meters ◽  
Power Added Efficiency ◽  
Matching Networks ◽  
Grid Applications ◽  
Advanced Metering

Background: With the tremendous increase in the usage of smart meters for industrial/ household purposes, their implementation is considered a crucial challenge in the Internet of Things (IoT) world, leading to a demand for emerging 5G technology. In addition, a large amount of data has to be communicated by smart meters efficiently, which needs a significant enhancement in bandwidth. The power amplifier (PA) plays a major role in deciding the efficiency and bandwidth of the entire communication system. Among the various modes of PAs, a newly developed Class-J mode PA has been proven to achieve high efficiency over a wide bandwidth by maintaining linearity. Methods: This paper proposes a Class-J mode PA design methodology using a CGH40010F-GaN device that operates at a 3.5 GHz frequency to meet the requirements of 5G wireless communication technology for the replacement of existing 4G/LTE technology used for advanced metering infrastructure (AMI) in smart grids. This research's main objective is to design the proper matching networks (M.Ns) to achieve Class-J mode operation that satisfies the bandwidth requirements of 5G smart grid applications. With the target impedances obtained using the load-pull simulation, lumped element matching networks are analyzed and designed in 3 ways using the ADS EDA tool. Results: The simulation results reveal that the proposed Class-J PA provides a maximum drain efficiency (D.E) of 82%, power added efficiency (PAE) of 67% with 13 dB small-signal gain at 3.5 GHz, and output power of 40 dBm (41.4 dBm peak) with a power gain of approximately 7 dB over a bandwidth of approximately 400 MHz with a 28 V power supply into a 50 Ω load. Conclusion: The efficiency and bandwidth of the proposed Class-J PA can be enhanced further by fine-tuning the matching network design to make it more suitable for 5G smart meter/grid applications.

scholarly journals A C-band high efficiency second harmonic tuned hybrid power amplifier in GaN technology

2005 ◽  
Author(s):  
P. Colantonio ◽  
F. Giannini ◽  
R. Giofre ◽  
E. Limiti ◽  
A. Serino ◽  
...  
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Second Harmonic ◽  
Hybrid Power

scholarly journals Design of a High-Efficiency GaN High-Electron Mobility Transistor Microwave Power Amplifier

2020 ◽  
Vol 30.8 (147) ◽  
pp. 46-50
Author(s):  
Duy Manh Luong ◽  
◽  
Huy Hoang Nguyen
Keyword(s):  
Power Amplifier ◽  
Microwave Power ◽  
Electron Mobility ◽  
High Efficiency ◽  
High Electron Mobility Transistor ◽  
Satellite Communications ◽  
High Electron ◽  
High Electron Mobility ◽  
Power Added Efficiency ◽  
Microwave Power Amplifier

This study presents a design procedure to obtain high-efficiency for microwave power amplifier. The designed amplifier uses a GaN high electron mobility transistor as an active device. Matching networks including input and output networks are realized using Megtron6 substrate microstrip lines. The designed amplifier operates at 2.1 GHz band. The simulated results show that the amplifier delivers a maximum power-added efficiency of 73.2% at output power and power gain of 47.8 dBm and 13.8 dB, respectively. This promising designed performance makes this amplifier to be an excellent candidate for use in modern wireless communication systems like radar, mobile network, and satellite communications.

A High Efficiency CMOS Power Amplfieir with a Diode Linearizer and Voltage Combining Transformers

2011 ◽  
Vol 110-116 ◽  
pp. 5500-5504
Author(s):  
Ki Jin Kim ◽  
Tae Ho Lim ◽  
S.H. Park ◽  
K. H. Ahn
Keyword(s):  
Power Amplifier ◽  
Insertion Loss ◽  
High Efficiency ◽  
Cmos Technology ◽  
High Current ◽  
Class Ab ◽  
Power Added Efficiency ◽  
Supply Condition ◽  
Saturation Power ◽  
Low Insertion Loss

This paper proposes a high efficiency power amplifier with a diode linearizer and voltage combining transformers in a standard 0.13-μm TSMC CMOS technology. The 3-D simulated transformer adopts multi-finger architecture which provides low insertion loss and allows high current capacity on the transformer. With the 4 differentially cascaded connected multi-finger transformers, the amplifier delivers more than 1W output power under 1.8 V supply condition. To enhance linearity of the power amplifier, the diode configuration bias circuit is used in this paper. With all integration of transformers, balun, diode bias circuits and same 4 diff-amps, the prototype Class AB Power Amplifier shows 32dBm saturation power at 2.4 GHz. Due to the diode linearizer the output P1dB is 30.8 dBm with 28 % Power Added Efficiency.

Sign in / Sign up

Export Citation Format

Share Document