scholarly journals X-Band High-Efficiency Continuous Class B Power Amplifier GaN MMIC Assisted by Input Second-Harmonic Tuning

Electronics ◽  
2019 ◽  
Vol 8 (11) ◽  
pp. 1312 ◽  
Author(s):  
Chen Jin ◽  
Yuan Gao ◽  
Wei Chen ◽  
Jianhua Huang ◽  
Zhiyu Wang ◽  
...  
Keyword(s):  
Power Amplifier ◽  
Integrated Circuit ◽  
High Efficiency ◽  
Second Harmonic ◽  
Power Added Efficiency ◽  
Optimum Load ◽  
Measurement Results ◽  
Class B ◽  
Point To Point ◽  
Output Capacitance

This paper presents a high-efficiency continuous class B power amplifier MMIC (Monolithic Microwave Integrated Circuit) from 8 GHz to 10.5 GHz, fabricated with 0.25 μm GaN-on-SiC technology. The Pedro load-line method was performed to calculate the optimum load of the GaN field-effect transistor (FET) for efficiency enhancement. Optimized by an output second-harmonic tuned network, fundamental to second-harmonic impedance, mapping was established point-to-point within a broad frequency band, which approached the classic continuous class B mode with an expanded high-efficiency bandwidth. Moreover, the contribution to the output capacitance of the FET was introduced into the output second-harmonic tuned network, which simplified the structure of the output matching network. Assisted by the second-harmonic source-pull technique, the input second-harmonic tuned network was optimized to improve the efficiency of the power amplifier over the operation band. The measurement results showed 51–59% PAE (Power Added Efficiency) and 19.8–21.2 dB power gain with a saturated power of 40.8–42.2 dBm from 8 GHz to 10.5 GHz. The size of the chip was 3.2 × 2.4 mm2.

scholarly journals An X-Band 40 W Power Amplifier GaN MMIC Design by Using Equivalent Output Impedance Model

Electronics ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 99 ◽  
Author(s):  
Ruitao Chen ◽  
Ruchun Li ◽  
Shouli Zhou ◽  
Shi Chen ◽  
Jianhua Huang ◽  
...  
Keyword(s):  
Power Amplifier ◽  
Integrated Circuit ◽  
High Efficiency ◽  
High Electron Mobility Transistor ◽  
Band Pass Filter ◽  
High Electron ◽  
Large Signal ◽  
Pass Filter ◽  
Power Added Efficiency ◽  
X Band

This paper presents an X-band 40 W power amplifier with high efficiency based on 0.25 μm GaN HEMT (High Electron Mobility Transistor) on SiC process. An equivalent RC (Resistance Capacitance) model is presented to provide accurate large-signal output impedances of GaN HEMTs with arbitrary dimensions. By introducing the band-pass filter topology, broadband impedance matching networks are achieved based on the RC model, and the power amplifier MMIC (Monolithic Microwave Integrated Circuit) with enhanced bandwidth is realized. The measurement results show that this power amplifier at 28 V operation voltage achieved over 40 W output power, 44.7% power-added efficiency and 22 dB power gain from 8 GHz to 12 GHz. The total chip size is 3.20 mm × 3.45 mm.

scholarly journals A Broadband High-Efficiency Hybrid Continuous Inverse Power Amplifier Based on Extended Admittance Space

2021 ◽  
Vol 9 ◽  
Author(s):  
Chun Ni ◽  
Hui Wang ◽  
Jing Liu ◽  
Mingsheng Chen ◽  
Zhongxiang Zhang ◽  
...  
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Second Harmonic ◽  
Inverse Power ◽  
Shift Parameter ◽  
Class B ◽  
Operating Bandwidth ◽  
Detailed Mathematical Analysis ◽  
Continuous Inverse ◽  
Good Agreement

A novel hybrid continuous inverse power amplifier (PA) that is constituted by a continuum of PA modes from the continuous inverse class-F to the continuous inverse class-B/J is proposed, and a detailed mathematical analysis is presented. The fundamental and second harmonic admittance spaces of the hybrid PA proposed in this article are analyzed mathematically. By introducing the phase shift parameter into the current waveform formula of the hybrid continuous inverse PA, the design space of the fundamental and second harmonic admittance is expanded, further increasing the operating bandwidth. The efficiency of the amplifier under different parameter conditions is calculated. In order to verify this method, a broadband high-efficiency PA is designed and fabricated. The drain voltage and current waveforms of the amplifier are extracted for analysis. The experimental measured results show a 60.7–71.5% drain efficiency across the frequency band of 0.5–2.5 GHz (133% bandwidth), and the designed PA can obtain an 11.8–13.9 dB gain in the interesting frequency range. The measured results are confirmed to be in good agreement with theory and simulations.

Design of high-efficiency Hybrid Power Amplifier with concurrent F&F−1 class operations for 5G application

Frequenz ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Meisam Tahmasbi ◽  
Farhad Razaghian ◽  
Sobhan Roshani
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
New Method ◽  
Power Added Efficiency ◽  
Hybrid Power ◽  
Novel Structure ◽  
Mode A

Abstract This paper presents a novel structure of Hybrid Power Amplifier (HPA) to operate in two arbitrary classes of operation at two desirable frequencies. The proposed HPA is designed in concurrent F&F−1 classes, simultaneously for 5G application. Presented HPA can solve the harmonics interference problem for concurrent F and F−1 classes and also for any arbitrary class of operation in desired frequencies. The designed HPA operates at 1.5 GHz frequency in the F class mode, while operates at 2.1 GHz frequency in the F−1 class mode. A new method is presented by using two diplexers to provide two paths for signal in different frequencies. Two parallel paths are used at the output of the HPA circuit, so the proposed HPA can operate at two classes. Two diplexers are used in the HPA to make proper isolation between the designed paths. In design of the proposed HPA, according to the utilized diplexers, the amplifier can operate between two arbitrary classes of operation at desired frequencies without any specific switch. The measured drain efficiency (DE) and power added efficiency (PAE) parameters are 57 and 51%, respectively at 2.1 GHz, while measured DE and PAE are 64 and 54%, respectively at 1.5 GHz.

scholarly journals A 2.5-GHz 1-V High Efficiency CMOS Power Amplifier IC with a Dual-Switching Transistor and Third Harmonic Tuning Technique

Electronics ◽  
2019 ◽  
Vol 8 (1) ◽  
pp. 69 ◽  
Author(s):  
Taufiq Alif Kurniawan ◽  
Toshihiko Yoshimasu
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Low Voltage ◽  
Supply Voltage ◽  
Drain Current ◽  
Cmos Technology ◽  
Back Gate ◽  
Third Harmonic ◽  
Power Added Efficiency ◽  
Switching Transistor

This paper presents a 2.5-GHz low-voltage, high-efficiency CMOS power amplifier (PA) IC in 0.18-µm CMOS technology. The combination of a dual-switching transistor (DST) and a third harmonic tuning technique is proposed. The DST effectively improves the gain at the saturation power region when the additional gain extension of the secondary switching transistor compensates for the gain compression of the primary one. To achieve high-efficiency performance, the third harmonic tuning circuit is connected in parallel to the output load. Therefore, the flattened drain current and voltage waveforms are generated, which in turn reduce the overlapping and the dc power consumption significantly. In addition, a 0.5-V back-gate voltage is applied to the primary switching transistor to realize the low-voltage operation. At 1 V of supply voltage, the proposed PA has achieved a power added efficiency (PAE) of 34.5% and a saturated output power of 10.1 dBm.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

scholarly journals A Class-J Power Amplifier Implementation for Ultrasound Device Applications

Sensors ◽  
2020 ◽  
Vol 20 (8) ◽  
pp. 2273 ◽  
Author(s):  
Kiheum You ◽  
Seung-Hwan Kim ◽  
Hojong Choi
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Second Harmonic ◽  
Signal Spectrum ◽  
Electronic Components ◽  
Echo Signal ◽  
Ultrasonic Device ◽  
Device Applications ◽  
Ultrasonic Devices ◽  
High Output

In ultrasonic systems, power amplifiers are one of the most important electronic components used to supply output voltages to ultrasonic devices. If ultrasonic devices have low sensitivity and limited maximum allowable voltages, it can be quite challenging to detect the echo signal in the ultrasonic system itself. Therefore, the class-J power amplifier, which can generate high output power with high efficiency, is proposed for such ultrasonic device applications. The class-J power amplifier developed has a power efficiency of 63.91% and a gain of 28.16 dB at 25 MHz and 13.52 dBm input. The pulse-echo measurement method was used to verify the performance of the electronic components used in the ultrasonic system. The echo signal appearing with the discharged high voltage signal was measured. The amplitude of the first echo signal in the measured echo signal spectrum was 4.4 V and the total-harmonic-distortion (THD), including the fundamental signal and the second harmonic, was 22.35%. The amplitude of the second echo signal was 1.08 V, and the THD, including the fundamental signal and the second harmonic, was 12.45%. These results confirm that a class-J power amplifier can supply a very high output echo signal to an ultrasonic device.

Design of a Miniaturized Class F Power Amplifier Using Capacitor Loaded Transmission Lines

Frequenz ◽  
2020 ◽  
Vol 74 (3-4) ◽  
pp. 145-152
Author(s):  
Ali Pirasteh ◽  
Saeed Roshani ◽  
Sobhan Roshani
Keyword(s):  
Power Amplifier ◽  
Mobile Communications ◽  
Transmission Lines ◽  
Low Voltage ◽  
Good Choice ◽  
Band Frequency ◽  
Power Added Efficiency ◽  
Harmonic Control ◽  
Measurement Results ◽  
Class F

AbstractIn this paper, a new method to decrease the dimensions of the microstrip structures and reducing the overall size of the class F amplifiers is presented. First, by using the PHEMT transistor with a conventional harmonic control circuit (HCC), a low-voltage class F amplifier in the L band frequency at the operating frequency of 1.75 GHz is introduced, which named primitive class F power amplifier. Then, this amplifier is optimized by using capacitor loaded transmission lines (CLTLs). The measurement results of the amplifier show that by using the CLTL structure, the overall size has been reduced 85% (0.23 λg × 0.17 λg). The maximum power-added efficiency (PAE) of the power amplifier is about 77.5 % and the power gain which has been reached to 18.33 dB. The desirable features of this power amplifier, along with its very small size, make this power amplifier a good choice to use for the global system for mobile communications.

A Simple Method of Designing High-Efficiency Second-Harmonic-Tuned Power Amplifier

2017 ◽  
Vol 27 (12) ◽  
pp. 1149-1151 ◽  
Author(s):  
Qi Cai ◽  
Wenquan Che ◽  
Kaixue Ma ◽  
Liming Gu
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Second Harmonic ◽  
Simple Method

A 10-W S-band class-B GaN amplifier with a dynamic gate bias circuit for linearity enhancement

2013 ◽  
Vol 6 (1) ◽  
pp. 3-11 ◽  
Author(s):  
Pierre Medrel ◽  
Audrey Martin ◽  
Tibault Reveyrand ◽  
Guillaume Neveux ◽  
Denis Barataud ◽  
...  
Keyword(s):  
Output Power ◽  
Trajectory Optimization ◽  
High Efficiency ◽  
Average Power ◽  
Gate Bias ◽  
Error Vector Magnitude ◽  
Power Added Efficiency ◽  
Class B ◽  
Band Class ◽  
A Minor

In the present paper, we present a dynamic gate biasing technique applied to a 10 W, S-band GaN amplifier. The proposed methodology addresses class-B operation of power amplifiers that offers the potential for high efficiency but requires a careful attention to maintain good linearity performances at large output power back-off. This work proposes a solution to improve the linearity of class-B amplifiers driven by radio frequency-modulated signals having large peak to average power ratios. An important aspect of this work concerns the characterization of the dynamic behavior of GaN devices for gate bias trajectory optimization. For that purpose, the experimental study reported here is based on the use of a time-domain envelope setup. A specific gate bias circuit has been designed and connected to a 10 W – 2.5 GHz GaN amplifier demo board from CREE. Compared to conventional class-B operation with a fixed gate bias, a 10-dB improvement in terms of third-order intermodulation is reached. When applied to the amplification of 16-QAM signals the proposed technique demonstrates significant ACPR reduction of order of 6 dB along with error vector magnitude (EVM) improvements of five points over 8 dB output power back-off with a minor impact on power-added efficiency performances.

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