An Approach for Characterizing Residual Mechanical Stress Caused by Packaging Processes

2006 ◽  
Vol 969 ◽  
Author(s):  
Soeren Hirsch ◽  
Bertram Schmidt
Keyword(s):  
Finite Element Method ◽  
Mechanical Stress ◽  
Flip Chip ◽  
Finite Element Method Simulation ◽  
Stress Profile ◽  
Test Chip ◽  
Resistor Network ◽  
Mems Sensor ◽  
Chip Technology ◽  
Residual Mechanical Stress

Abstractthis paper reports on a method for estimation and minimization of mechanical stress on MEMS sensor and actuator structures due to packaging processes based on flip chip technology. For studying mechanical stress a test chip with silicon membranes was fabricated. Finite element method simulation was calculate the stress profile and to determine the optimum positions for placing the resistor network.

Thin-Die Flip Chip Physical-FA Process Flow

2002 ◽  
Author(s):  
Andrew J. Komrowski ◽  
N. S. Somcio ◽  
Daniel J. D. Sullivan ◽  
Charles R. Silvis ◽  
Luis Curiel ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Failure Analysis ◽  
Flip Chip ◽  
Semiconductor Industry ◽  
Organic Substrate ◽  
Fault Isolation ◽  
Preparation Methods ◽  
Chip Technology ◽  
Isolation Test ◽  
Sample Preparation Methods

Abstract The use of flip chip technology inside component packaging, so called flip chip in package (FCIP), is an increasingly common package type in the semiconductor industry because of high pin-counts, performance and reliability. Sample preparation methods and flows which enable physical failure analysis (PFA) of FCIP are thus in demand to characterize defects in die with these package types. As interconnect metallization schemes become more dense and complex, access to the backside silicon of a functional device also becomes important for fault isolation test purposes. To address these requirements, a detailed PFA flow is described which chronicles the sample preparation methods necessary to isolate a physical defect in the die of an organic-substrate FCIP.

Failure Analysis of Flip-Chip Interconnections Through Acoustic Microscopy

1996 ◽  
Author(s):  
O. Diaz de Leon ◽  
M. Nassirian ◽  
C. Todd ◽  
R. Chowdhury
Keyword(s):  
Failure Analysis ◽  
Large Scale ◽  
Flip Chip ◽  
Ultrasonic Waves ◽  
Acoustic Microscopy ◽  
Acoustic Microscope ◽  
Chip Technology ◽  
Ball Joints ◽  
Non Destructive ◽  
Scanning Acoustic Microscope

Abstract Integration of circuits on semiconductor devices with resulting increase in pin counts is driving the need for improvements in packaging for functionality and reliability. One solution to this demand is the Flip- Chip concept in Ultra Large Scale Integration (ULSI) applications [1]. The flip-chip technology is based on the direct attach principle of die to substrate interconnection.. The absence of bondwires clearly enables packages to become more slim and compact, and also provides higher pin counts and higher-speeds [2]. However, due to its construction, with inherent hidden structures the Flip-Chip technology presents a challenge for non-destructive Failure Analysis (F/A). The scanning acoustic microscope (SAM) has recently emerged as a valuable evaluation tool for this purpose [3]. C-mode scanning acoustic microscope (C-SAM), has the ability to demonstrate non-destructive package analysis while imaging the internal features of this package. Ultrasonic waves are very sensitive, particularly when they encounter density variations at surfaces, e.g. variations such as voids or delaminations similar to air gaps. These two anomalies are common to flip-chips. The primary issue with this package technology is the non-uniformity of the die attach through solder ball joints and epoxy underfill. The ball joints also present defects as open contacts, voids or cracks. In our acoustic microscopy study packages with known defects are considered. It includes C-SCAN analysis giving top views at a particular package interface and a B-SCAN analysis that provides cross-sectional views at a desired point of interest. The cross-section analysis capability gives confidence to the failure analyst in obtaining information from a failing area without physically sectioning the sample and destroying its electrical integrity. Our results presented here prove that appropriate selection of acoustic scanning modes and frequency parameters leads to good reliable correlation between the physical defects in the devices and the information given by the acoustic microscope.

scholarly journals New Sensor for Medium- and High-Voltage Measurement

Energies ◽  
2021 ◽  
Vol 14 (15) ◽  
pp. 4654
Author(s):  
Andrzej Wetula ◽  
Andrzej Bień ◽  
Mrunal Parekh
Keyword(s):  
Finite Element Method ◽  
Electronic Devices ◽  
Finite Element Method Simulation ◽  
Laboratory Model ◽  
Power Electronic ◽  
Proof Of Concept ◽  
Voltage Measurement ◽  
Medium Voltage ◽  
Narrow Frequency Band ◽  
Further Development

Measurements of medium and high voltages in a power grid are normally performed with large and bulky voltage transformers or capacitive dividers. Besides installation problems, these devices operate in a relatively narrow frequency band, which limits their usability in modern systems that are saturated with power electronic devices. A sensor that can be installed directly on a wire and can operate without a galvanic connection to the ground may be used as an alternative voltage measurement device. This type of voltage sensor can complement current sensors installed on a wire, forming a complete power acquisition system. This paper presents such a sensor. Our sensor is built using two dielectric elements with different permeability coefficients. A finite element method simulation is used to estimate the parameters of a constructed sensor. Besides simulations, a laboratory model of a sensor was built and tested in a medium-voltage substation. Our results provide a proof of concept for the presented sensor. Some errors in voltage reconstruction have been traced to an oversimplified data acquisition and transmission system, which has to be improved during the further development of the sensor.

scholarly journals Design and Switching Characteristics of Flip-Chip GaN Half-Bridge Modules Integrated with Drivers

2021 ◽  
Vol 11 (15) ◽  
pp. 7057
Author(s):  
Lin Wang ◽  
Zhe Cheng ◽  
Zhi-Guo Yu ◽  
De-Feng Lin ◽  
Zhe Liu ◽  
...  
Keyword(s):  
Flip Chip ◽  
High Electron Mobility Transistors ◽  
Wire Bonding ◽  
High Electron ◽  
Parasitic Inductance ◽  
Switching Performance ◽  
Turn On ◽  
Electron Mobility Transistors ◽  
Chip Technology ◽  
Switching Characteristics

Half-bridge modules with integrated GaN high electron mobility transistors (HEMTs) and driver dies were designed and fabricated in this research. Our design uses flip-chip technology for fabrication, instead of more generally applied wire bonding, to reduce parasitic inductance in both the driver-gate and drain-source loops. Modules were prepared using both methods and the double-pulse test was applied to evaluate and compare their switching characteristics. The gate voltage (Vgs) waveform of the flip-chip module showed no overshoot during the turn-on period, and a small oscillation during the turn-off period. The probabilities of gate damage and false turn-on were greatly reduced. The inductance in the drain-source loop of the module was measured to be 3.4 nH. The rise and fall times of the drain voltage (Vds) were 12.9 and 5.8 ns, respectively, with an overshoot of only 4.8 V during the turn-off period under Vdc = 100 V. These results indicate that the use of flip-chip technology along with the integration of GaN HEMTs with driver dies can effectively reduce the parasitic inductance and improve the switching performance of GaN half-bridge modules compared to wire bonding.

Monolithic Thin Film Red LED Active-matrix Micro-display by Flip-chip Technology

2021 ◽  
pp. 1-1
Author(s):  
Peian Li ◽  
Xu Zhang ◽  
Wing Cheung Chong ◽  
Kei May Lau
Keyword(s):  
Thin Film ◽  
Flip Chip ◽  
Active Matrix ◽  
Chip Technology ◽  
Red Led

scholarly journals Finite Element Method modeling of Additive Manufactured Compressor Wheel

2021 ◽  
Author(s):  
Márton Tamás Birosz ◽  
Mátyás Andó ◽  
Sudhanraj Jeganmohan
Keyword(s):  
Finite Element Method ◽  
Finite Element ◽  
Finite Element Method Simulation ◽  
Element Model ◽  
Tensile Tests ◽  
Raw Material ◽  
Isotropic Hardening ◽  
Compressor Wheel ◽  
Material Extrusion ◽  
Element Method

AbstractDesigning components is a complex task, which depends on the component function, the raw material, and the production technology. In the case of rotating parts with higher RPM, the creep and orientation are essential material properties. The PLA components made with the material extrusion process are more resistant than VeroWhite (material jetting) and behave similarly to weakly cross-linked elastomers. Also, based on the tensile tests, Young’s modulus shows minimal anisotropy. Multilinear isotropic hardening and modified time hardening models are used to create the finite element model. Based on the measurements, the finite element method simulation was identified. The deformation in the compressor wheel during rotation became definable. It was concluded that the strain of the compressor wheel manufactured with material extrusion technology is not significant.

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