Defect Reduction in Mocvd Grown Si/GaAs

1988 ◽  
Vol 116 ◽  
Author(s):  
M.M. Al-Jassim ◽  
Takashi Nishioka ◽  
Yoshio Itoh ◽  
Akio Yamamoto ◽  
Masafumi Yamaguchi
Keyword(s):  
Layer Thickness ◽  
Threading Dislocations ◽  
Defect Reduction ◽  
Closed Loops ◽  
Si Substrates ◽  
Dislocation Densities ◽  
Low Pressure Mocvd ◽  
Strained Layer Superlattices ◽  
Lattice Matched

AbstractThe effectiveness of thermal annealing and strained layer superlattices (SLS's) in defect reduction in Si/GaAs structures was studied. The GaAs layers were grown on (100) Si substrates by low pressure MOCVD. They were evaluated by TEM, HREM, EBIC and PL. As-grown layers contained dislocation densities in the 108-109 cm−2 range, depending on the layer thickness. Post-growth and in situ annealing were performed on a wide variety of these structures. TEM examination showed that in situ annealing was more effective as it resulted in confining a large portion of the threading dislocations to the interface region. Furthermore, the interaction of threading dislocations to form closed loops was evident. Additionally, the effect of GaAs/GaInAs and GaInAs/GaAsP SLS's on dislocation bending was investigated. The former SLS, although not lattice matched to GaAs, proved more effective.

Defect Reduction in GaAs Epilayers on Si Substrates Using Strained Layer Superlattices

1987 ◽  
Vol 91 ◽  
Author(s):  
N. El-Masry ◽  
N. Hamaguchi ◽  
J.C.L. Tarn ◽  
N. Karam ◽  
T.P. Humphreys ◽  
...  
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Buffer Layers ◽  
Threading Dislocations ◽  
Defect Reduction ◽  
Strained Layer ◽  
Si Substrates ◽  
Density Of Dislocations ◽  
Strained Layer Superlattice ◽  
Strained Layer Superlattices

ABSTRACTInxGa11-xAs-GaAsl-yPy strained layer superlattice buffer layers have been used to reduce threading dislocations in GaAs grown on Si substrates. However, for an initially high density of dislocations, the strained layer superlattice is not an effective filtering system. Consequently, the emergence of dislocations from the SLS propagate upwards into the GaAs epilayer. However, by employing thermal annealing or rapid thermal annealing, the number of dislocation impinging on the SLS can be significantly reduced. Indeed, this treatment greatly enhances the efficiency and usefulness of the SLS in reducing the number of threading dislocations.

TEM characterization of dislocation reduction processes in GaAs/Si

1989 ◽  
Vol 47 ◽  
pp. 590-591
Author(s):  
R.A. Herring ◽  
P.N. Uppal ◽  
S.P. Svensson ◽  
J.S. Ahearn
Keyword(s):  
Lattice Mismatch ◽  
Threading Dislocation ◽  
Threading Dislocations ◽  
Growth Interface ◽  
Dislocation Reduction ◽  
Dislocation Densities ◽  
Threading Dislocation Density ◽  
Interfacial Dislocations ◽  
Strained Layer Superlattices

A high density of interfacial dislocations are needed at the GaAs/Si interface to alleviate the 4% lattice mismatch between GaAs and Si. Some remnant dislocations thread through the epilayer and follow the growth interface. Current growth methods are not able to obtain acceptable threading dislocation densities (104 – 105) for devices. Many methods can be used to reduce the number of threading dislocations which include misorienting the substrate to enhance the slip of dislocations on specific [110]{111} planes, annealing during and after growth, and adding strained layer superlattices (SLS's) to block dislocations. Conventional TEM (CTEM), performed using a JEM 100c, has been used to characterize threading dislocations in the epilayer of a GaAs/Si material where in situ thermal annealing and SLS's force dislocation reactions and thereby reduce the threading dislocation density. Using TEM we have viewed dislocations under many two-beam diffraction conditions and with the help of a stereogram have determined their Burgers vectors (b), line directions (u) and habit planes (R).

Advanced Si-based Semiconductors for Energy and Photonic Applications

2009 ◽  
Vol 156-158 ◽  
pp. 77-84 ◽  
Author(s):  
J. Kouvetakis ◽  
Jose Menendez ◽  
John Tolle
Keyword(s):  
Precursor Chemistry ◽  
Group Iv ◽  
Device Fabrication ◽  
Interface Microstructure ◽  
Si Substrates ◽  
Group Iv Semiconductors ◽  
Dislocation Densities ◽  
Potential Applications ◽  
Molecular Mixtures ◽  
Lattice Matched

Group-IV semiconductors, including alloys incorporating Sn, have been grown on dimensionally dissimilar Si substrates using novel molecular hydride chemistries with tunable reactivities that enable low temperature, CMOS compatible integration via engineering of the interface microstructure. Here we focus on properties of three such Ge-based systems including: (1) device quality Ge layers with thicknesses >5m possessing dislocation densities <105/cm2 are formed using molecular mixtures of Ge2H6 and highly reactive (GeH3)2CH2 organometallic additives circumventing the classical Stranski-Krastanov growth mechanism, (2) metastable GeSn alloys are grown on Si via reactions of Ge2H6 and SnD4, and (3) ternary SiGeSn analogs are produced lattice-matched to Ge-buffered Si using admixtures of SiGeH6, SiGe2H8, SnD4, Ge2H6, and Si3H8. Optical experiments and prototype device fabrication demonstrate that the ternary SiGeSn system represents the first group-IV alloy with a tunable electronic structure at fixed lattice constant, effectively decoupling band gap and strain and eliminating the most important limitation in device designs based on group-IV materials. Doping at levels higher than 1019 cm-3 (both p and n-type) is achieved for all the above semiconductor systems using a similar precursor chemistry approach. Electrical and infrared optical experiments demonstrate that doped GeSn and SiGeSn have mobilities that compare or exceed that of bulk Ge. The potential applications of these materials, including micro- and optoelectronics as well as photovoltaics and thermoelectricity, are discussed.

Origination and Properties of Dislocations in Thin Film Nitrides

2007 ◽  
Vol 131-133 ◽  
pp. 39-46 ◽  
Author(s):  
Horst P. Strunk
Keyword(s):  
Thermal Stresses ◽  
Epitaxial Layers ◽  
Threading Dislocations ◽  
Power Structures ◽  
Present Contribution ◽  
Group Iii ◽  
Material Development ◽  
Dislocation Densities ◽  
Group Iii Nitride ◽  
Lattice Matched

Epitaxial group-III nitride films, although in single crystalline form, contain still a large number of threading dislocations. These set limits to performance and lifetime of devices, notably to high power structures like lasers. The strategy in material development was and will be (at least until lattice-matched substrates become available) to reduce the dislocation densities. The present contribution elaborates on possible dislocation origination mechanisms that determine the population of dislocations in the epitaxial layers. These mechanisms can be controlled to a certain degree by proper deposition procedures. The achieved dislocation populations then determine the processes that can reduce the dislocation densities during growth of the epitaxial layers. The mutual annihilation of threading dislocations is rather efficient although affected by the glide properties of the growing epitaxial crystal and the thermal stresses during the cooling down after growth.

Optimization of SiGe Graded Buffer Defectivity and Throughput by Means of High Growth Temperature and Pre-Threaded Substrates

2005 ◽  
Vol 891 ◽  
Author(s):  
Matthew Erdtmann ◽  
Matthew T. Currie ◽  
Joseph C. Woicik ◽  
David Black
Keyword(s):  
Growth Temperature ◽  
High Growth ◽  
Dislocation Nucleation ◽  
Threading Dislocation ◽  
Threading Dislocations ◽  
Trade Off ◽  
Dislocation Glide ◽  
Si Substrates ◽  
High Growth Temperature ◽  
Dislocation Densities

ABSTRACTDislocation glide kinetics dictate in relaxed graded buffers a fundamental opposition between the defectivity and throughput. For state-of-the-art Si-based applications, the trade-off between defect level and wafer cost (inversely related to throughput) has made the insertion of SiGe graded buffers into production difficult. We aim to mitigate the trade-off by reporting two advances that enable simultaneous improvements in both defectivity and throughput. The first is use of a high growth temperature to allow very fast dislocation glide velocities and growth rates as high as 1.0 μm/min. The second is the use of “pre-threaded” Si substrates, substrates with an elevated density of threading dislocations. By having dislocation nucleation controlled by uniformly distributed substrate threading dislocations, instead of unpredictable heterogeneous sources, impediments to dislocation glide, such as dislocation bundles and pile-ups, are reduced. By incorporating both advances into SiGe graded buffer epitaxy, dislocation pile-up densities are reduced by nearly three orders of magnitude, threading dislocation densities are reduced by a factor of 7.4×, and wafer throughput is increased at least 33%.

Influence of MBE Growth Conditions on Dislocation Densities of GaAs/Ge Epilayers Grown on Silicon Substrates

1985 ◽  
Vol 43 ◽  
pp. 364-365
Author(s):  
K.M. Hones ◽  
P. Sheldon ◽  
B.G. Yacobi ◽  
A. Mason
Keyword(s):  
High Efficiency ◽  
Lattice Mismatch ◽  
Low Cost ◽  
Growth Conditions ◽  
Nonradiative Recombination ◽  
Device Structure ◽  
Si Substrates ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Dislocation Type

There is increasing interest in growing epitaxial GaAs on Si substrates. Such a device structure would allow low-cost substrates to be used for high-efficiency cascade- junction solar cells. However, high-defect densities may result from the large lattice mismatch (∼4%) between the GaAs epilayer and the silicon substrate. These defects can act as nonradiative recombination centers that can degrade the optical and electrical properties of the epitaxially grown GaAs. For this reason, it is important to optimize epilayer growth conditions in order to minimize resulting dislocation densities. The purpose of this paper is to provide an indication of the quality of the epitaxially grown GaAs layers by using transmission electron microscopy (TEM) to examine dislocation type and density as a function of various growth conditions. In this study an intermediate Ge layer was used to avoid nucleation difficulties observed for GaAs growth directly on Si substrates. GaAs/Ge epilayers were grown by molecular beam epitaxy (MBE) on Si substrates in a manner similar to that described previously.

Anisotropy of interfacial defects in the initial stage of MOVPE GaAs growth On Si

1990 ◽  
Vol 48 (4) ◽  
pp. 592-593
Author(s):  
C. Vannuffel ◽  
C. Schiller ◽  
J. P. Chevalier
Keyword(s):  
Early Stage ◽  
Threading Dislocations ◽  
Mbe Growth ◽  
Detailed Mechanism ◽  
Si Substrates ◽  
Initial Stage ◽  
Interfacial Defects ◽  
Interfacial Dislocations ◽  
Step Growth ◽  
Essential Problem

Recently, interest has focused on the epitaxy of GaAs on Si as a promising material for electronic applications, potentially for integration of optoelectronic devices on silicon wafers. The essential problem concerns the 4% misfit between the two materials, and this must be accommodated by a network of interfacial dislocations with the lowest number of threading dislocations. It is thus important to understand the detailed mechanism of the formation of this network, in order to eventually reduce the dislocation density at the top of the layers.MOVPE growth is carried out on slightly misoriented, (3.5°) from (001) towards , Si substrates. Here we report on the effect of this misorientation on the interfacial defects, at a very early stage of growth. Only the first stage, of the well-known two step growth process, is thus considered. Previously, we showed that full substrate coverage occured for GaAs thicknesses of 5 nm in contrast to MBE growth, where substantially greater thicknesses are required.

Exciton dynamics in thick GaN MOVPE epilayers deposited on sapphire.

1997 ◽  
Vol 2 ◽  
Author(s):  
J. Allègre ◽  
P. Lefebvre ◽  
J. Camassel ◽  
B. Beaumont ◽  
Pierre Gibart
Keyword(s):  
Layer Thickness ◽  
Buffer Layers ◽  
Rate Equations ◽  
Time Resolved ◽  
Versus Layer ◽  
Level Model ◽  
Shallow Impurities ◽  
Aln Buffer ◽  
Time Resolved Photoluminescence

Time-resolved photoluminescence spectra have been recorded on three GaN epitaxial layers of thickness 2.5 μm, 7 μm and 16 μm, at various temperatures ranging from 8K to 300K. The layers were deposited by MOVPE on (0001) sapphire substrates with standard AlN buffer layers. To achieve good homogeneities, the growth was in-situ monitored by laser reflectometry. All GaN layers showed sharp excitonic peaks in cw PL and three excitonic contributions were seen by reflectivity. The recombination dynamics of excitons depends strongly upon the layer thickness. For the thinnest layer, exponential decays with τ ~ 35 ps have been measured for both XA and XB free excitons. For the thickest layer, the decay becomes biexponential with τ1 ~ 80 ps and τ2 ~ 250 ps. These values are preserved up to room temperature. By solving coupled rate equations in a four-level model, this evolution is interpreted in terms of the reduction of density of both shallow impurities and deep traps, versus layer thickness, roughly following a L−1 law.

In Situ Diagnostics of Vuv Laser Cvd of Semiconductor Interfaces by Ftir Spectroscopy and Spectroscopic Ellipsometry

1995 ◽  
Vol 397 ◽  
Author(s):  
M. Barth ◽  
J. Knobloch ◽  
P. Hess
Keyword(s):  
Film Thickness ◽  
Bulk Material ◽  
Substrate Surface ◽  
Cluster Formation ◽  
Interface Layer ◽  
Native Oxide ◽  
Initial Growth ◽  
Difference Spectra ◽  
Si Substrates

ABSTRACTThe growth of high quality amorphous hydrogenated semiconductor films was explored with different in situ spectroscopic methods. Nucleation of ArF laser-induced CVD of a-Ge:H on different substrates was investigated by real time ellipsometry, whereas the F2 laser (157nm) deposition of a-Si:H was monitored by FTIR transmission spectroscopy. The ellipsometric studies reveal a significant influence of the substrate surface on the nucleation stage, which in fact determines the electronic and mechanical properties of the bulk material. Coalescence of initial clusters occurs at a thickness of 16 Å for atomically smooth hydrogen-terminated c-Si substrates, whereas on native oxide covered c-Si substrates the bulk volume void fractions are not reached until 35 Å film thickness. For the first time we present a series of IR transmission spectra with monolayer resolution of the initial growth of a-Si:H. Hereby the film thickness was measured simultaneously using a quartz crystal microbalance with corresponding sensitivity. The results give evidence for cluster formation with a coalescence radius of about 20 Å. Difference spectra calculated for layers at different depths with definite thickness reveal that the hydrogen-rich interface layer stays at the substrate surface and does not move with the surface of the growing film. The decrease of the Urbach energy switching from native oxide to H-terminated substrates suggests a strong influence of the interface morphology on the bulk material quality.

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