Surface Cleaning and Passivation for the Growth of Si/Oxide/Si Structures

1992 ◽  
Vol 259 ◽  
Author(s):  
Kun—Chih Wang ◽  
Huey—Liang Hwang ◽  
Chung—Yuan Kung ◽  
Tri—Rung Yew
Keyword(s):  
Electron Microscopy ◽  
Cross Section ◽  
Vapor Deposition ◽  
Silicon Oxide ◽  
Silicon Layer ◽  
Chemical Vapor ◽  
Interface Structure ◽  
Surface Cleaning ◽  
Silicon Surfaces ◽  
Transmission Electron

ABSTRACTThis paper presents the results of surface cleaning and passivation of Si and oxide surfaces for the growth of Si/oxide/Si structures. Silicon surfaces are cleaned by the spin—etch process prior to the growth of silicon oxide. A silicon layer is then deposited after subsequent surface cleaning and chemical treatment on the surface of oxide/Si. Both the oxide and the silicon layers are grown in a plasma enhanced chemical vapor deposition system. The interface structure between layers of deposited Si/oxide/Si are observed by cross—section transmission electron microscopy (XTEM).

Transmission Electron Microscopy (TEM) Specimen Preparation Technique using Focused Ion Beam (FIB): Application to Material Characterization of Chemical Vapor Deposition of Tungsten (W) and Tungsten Silicides (WSix)

1997 ◽  
Author(s):  
K. Doong ◽  
J.-M. Fu ◽  
Y.-C. Huang
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Focused Ion Beam ◽  
Ion Beam ◽  
Chemical Vapor ◽  
Specimen Preparation ◽  
Preparation Technique ◽  
Transmission Electron

Abstract The specimen preparation technique using focused ion beam (FIB) to generate cross-sectional transmission electron microscopy (XTEM) samples of chemical vapor deposition (CVD) of Tungsten-plug (W-plug) and Tungsten Silicides (WSix) was studied. Using the combination method including two axes tilting[l], gas enhanced focused ion beam milling[2] and sacrificial metal coating on both sides of electron transmission membrane[3], it was possible to prepare a sample with minimal thickness (less than 1000 A) to get high spatial resolution in TEM observation. Based on this novel thinning technique, some applications such as XTEM observation of W-plug with different aspect ratio (I - 6), and the grain structure of CVD W-plug and CVD WSix were done. Also the problems and artifacts of XTEM sample preparation of high Z-factor material such as CVD W-plug and CVD WSix were given and the ways to avoid or minimize them were suggested.

Effectiveness and Reliability of Metal Diffusion Barriers for Copper Interconnects

1995 ◽  
Vol 403 ◽  
Author(s):  
G. Bai ◽  
S. Wittenbrock ◽  
V. Ochoa ◽  
R. Villasol ◽  
C. Chiang ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Vapor Deposition ◽  
Physical Vapor Deposition ◽  
Chemical Vapor ◽  
Diffusion Barriers ◽  
Copper Interconnects ◽  
Time To Failure ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron

AbstractCu has two advantages over Al for sub-quarter micron interconnect application: (1) higher conductivity and (2) improved electromigration reliability. However, Cu diffuses quickly in SiO2and Si, and must be encapsulated. Polycrystalline films of Physical Vapor Deposition (PVD) Ta, W, Mo, TiN, and Metal-Organo Chemical Vapor Deposition (MOCVD) TiN and Ti-Si-N have been evaluated as Cu diffusion barriers using electrically biased-thermal-stressing tests. Barrier effectiveness of these thin films were correlated with their physical properties from Atomic Force Microscopy (AFM), Transmission Electron Microscopy (TEM), Secondary Electron Microscopy (SEM), and Auger Electron Spectroscopy (AES) analysis. The barrier failure is dominated by “micro-defects” in the barrier film that serve as easy pathways for Cu diffusion. An ideal barrier system should be free of such micro-defects (e.g., amorphous Ti-Si-N and annealed Ta). The median-time-to-failure (MTTF) of a Ta barrier (30 nm) has been measured at different bias electrical fields and stressing temperatures, and the extrapolated MTTF of such a barrier is > 100 year at an operating condition of 200C and 0.1 MV/cm.

Challenge to 200 mm 3C-SiC Wafers Using SOI

2005 ◽  
Vol 483-485 ◽  
pp. 205-208 ◽  
Author(s):  
Motoi Nakao ◽  
Hirofumi Iikawa ◽  
Katsutoshi Izumi ◽  
Takashi Yokoyama ◽  
Sumio Kobayashi
Keyword(s):  
Cross Section ◽  
Vapor Deposition ◽  
Seed Layer ◽  
High Vacuum ◽  
Chemical Vapor ◽  
Ultra High Vacuum ◽  
Average Thickness ◽  
Entire Region ◽  
Transmission Electron ◽  
Good Crystallinity

200 mm wafer with 3C-SiC/SiO2/Si structure has been fabricated using 200 mm siliconon- insulator (SOI) wafer. A top Si layer of 200 mm SOI wafer was thinned down to approximately 5 nm by sacrificial oxidization, and the ultrathin top Si layer was metamorphosed into a 3C-SiC seed layer using a carbonization process. Afterward, an epitaxial SiC layer was grown on the SiC seed layer with ultra-high vacuum chemical vapor deposition. A cross-section transmission electron microscope indicated that a 3C-SiC seed layer was formed directly on the buried oxide layer of 200 mm wafer. The epitaxial SiC layer with an average thickness of approximately 100 nm on the seed was recognized over the entire region of the wafer, although thickness uniformity of the epitaxial SiC layer was not as good as that of SiC seed layer. A transmission electron diffraction image of the epitaxial SiC layer showed a monocrystalline 3C-SiC(100) layer with good crystallinity. These results indicate that our method enables to realize 200 mm SiC wafers.

Understanding the Growth Mechanisms of Tin Oxide Nanowires by Chemical Vapor Deposition

2021 ◽  
Vol 21 (4) ◽  
pp. 2538-2544
Author(s):  
Nguyen Minh Hieu ◽  
Nguyen Hoang Hai ◽  
Mai Anh Tuan
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Chemical Mapping ◽  
X Ray Diffraction ◽  
Lattice Constants ◽  
Transmission Electron ◽  
Scanning Transmission

Tin oxides nanowires were prepared by chemical vapor deposition using shadow mask. X-ray diffraction indicated that the products were tetragonal having crystalline structure with lattice constants a = 0.474 nm and c = 0.318 nm. The high-resolution transmission electron microscopy revealed that inter planar spacing is 0.25 nm. The results chemical mapping in scanning transmission electron microscopy so that the two elements of Oxygen and Tin are distributed very homogeneously in nanowires and exhibit no apparent elements separation. A bottom-up mechanism for SnO2 growth process has been proposed to explain the morphology of SnO2 nanowires.

scholarly journals Growth of U-Shaped Graphene Domains on Copper Foil by Chemical Vapor Deposition

Materials ◽  
2019 ◽  
Vol 12 (12) ◽  
pp. 1887
Author(s):  
Ming Pan ◽  
Chen Wang ◽  
Hua-Fei Li ◽  
Ning Xie ◽  
Ping Wu ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Growth Parameters ◽  
Copper Substrate ◽  
Chemical Vapor ◽  
Morphology Evolution ◽  
Force Microscopy ◽  
Smooth Edge ◽  
Transmission Electron

U-shaped graphene domains have been prepared on a copper substrate by chemical vapor deposition (CVD), which can be precisely tuned for the shape of graphene domains by optimizing the growth parameters. The U-shaped graphene is characterized by using scanning electron microscopy (SEM), atomic force microscopy (AFM), transmission electron microscopy (TEM), and Raman. These show that the U-shaped graphene has a smooth edge, which is beneficial to the seamless stitching of adjacent graphene domains. We also studied the morphology evolution of graphene by varying the flow rate of hydrogen. These findings are more conducive to the study of morphology evolution, nucleation, and growth of graphene domains on the copper substrate.

Non-Destructive Assessment of Thin Film Stresses and Crystal Qualify of Silicon on Insulator Materials with Raman Spectroscopy

1990 ◽  
Vol 188 ◽  
Author(s):  
Ingrid De Wolf ◽  
Jan Vanhellemont ◽  
Herman E. Maes
Keyword(s):  
Thin Film ◽  
Electron Microscopy ◽  
Raman Spectroscopy ◽  
Cross Section ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Micro Raman Spectroscopy ◽  
Transmission Electron ◽  
Non Destructive ◽  
Zone Melt

ABSTRACTMicro Raman spectroscopy (RS) is used to study the crystalline quality and the stresses in the thin superficial silicon layer of Silicon-On-Insulator (SO) materials. Results are presented for SIMOX (Separation by IMplanted OXygen) and ZMR (Zone Melt Recrystallized) substrates. Both as implanted and annealed SIMOX structures are investigated. The results from the as implanted structures are correlated with spectroscopic ellipsometry (SE) and cross-section transmission electron microscopy (TEM) analyses on the same material. Residual stress in ZMR substrates is studied in low- and high temperature gradient regions.

Ge Growth on Nanostructured Silicon Surfaces

2005 ◽  
Vol 862 ◽  
Author(s):  
Ganesh Vanamu ◽  
Abhaya K. Datye ◽  
Saleem H. Zaidi
Keyword(s):  
Electron Microscopy ◽  
Dislocation Density ◽  
Full Width Half Maximum ◽  
Defect Density ◽  
Chemical Vapor ◽  
Silicon Surfaces ◽  
X Ray Diffraction ◽  
Etch Pit ◽  
Transmission Electron

AbstractWe report highest quality Ge epilayers on nanoscale patterned Si structures. 100% Ge films of 10 μm are deposited using chemical vapor deposition. The quality of Ge layers was examined using scanning electron microscopy (SEM), transmission electron microscopy (TEM), and high-resolution x-ray diffraction (HRXRD) measurements. The defect density was evaluated using etch pit density measurements. We have obtained lowest dislocation density (5×105 cm-2) Ge films on the nanopatterned Si structures. The full width half maximum peaks of the reciprocal space maps of Ge epilayers on the nanopatterned Si showed 93 arc sec. We were able to get rid of the crosshatch pattern on the Ge surface grown on the nanopatterned Si. We also showed that there is a significant improvement of the quality of the Ge epilayers in the nanopatterned Si compared to an unpatterned Si. We observed nearly three-order magnitude decrease in the dislocation density in the patterned compared to the unpatterned structures. The Ge epilayer in the patterned Si has a dislocation density of 5×105 cm-2 as compared to 6×108 cm-2 for unpatterned Si.

Sign in / Sign up

Export Citation Format

Share Document