Beyond Thermal Budget: Using D · t In Kinetic Optimization Of RTP

1998 ◽  
Vol 525 ◽  
Author(s):  
R. Ditchfield ◽  
E. G. Seebauer
Keyword(s):  
Thermal Processing ◽  
Program Design ◽  
Rapid Thermal Processing ◽  
Dopant Diffusion ◽  
Thermal Budget ◽  
Microelectronic Fabrication ◽  
Kinetic Effects ◽  
Rigorous Method

ABSTRACTRapid thermal processing (RTP) has found continually increasing use for oxidation, silicidation, CVD, and other steps in microelectronic fabrication. Kinetic effects in rapid thermal processing (RTP) are often assessed using the concept of thermal budget, with the idea that low thermal budgets should minimize dopant diffusion and interface degradation. Some definitions of budget employ the product of temperature and time (T-t). In previous work, we have shown that this definition for budget often leads to qualitatively incorrect conclusions regarding heating program design. However, other definitions of budget employ the product of diffusivity and time (D-t), where the diffusivity describes unwanted diffusion or interface degradation. Here we show that minimization of D-t by itself is insufficient to kinetically optimize a heating program; account must be taken of the relative rates of the desired and undesired phenomena. We present a straightforward but rigorous method for doing so.

Problems with The Concept of Thermal Budget: Experimental Demonstrations

1997 ◽  
Vol 470 ◽  
Author(s):  
R. Ditchfield ◽  
E. G. Seebauer
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Dopant Diffusion ◽  
Thermal Budget ◽  
Kinetic Effects ◽  
Rapid Isothermal Processing ◽  
Diffusion Problems

ABSTRACTUp to now, kinetic effects in rapid thermal processing (RTP) have been assessed using the concept of thermal budget, with the idea that thermal budget minimization should minimize dopant diffusion and interface degradation. This work highlights shortcomings with that principle. Experiments comparing directly the rate of Si chemical vapor deposition with that of dopant diffusion show how thermal budget minimization can actually worsen diffusion problems rather than mitigate them. We present a straightforward framework for improving the results through comparison of activation energies of the desired and undesired phenomena. This framework explains the experimental results and provides strong kinetic arguments for continued development of rapid isothermal processing and small batch fast ramp methods.

General Kinetic Rules for Rapid Thermal Processing

1996 ◽  
Vol 429 ◽  
Author(s):  
R. Ditchfield ◽  
E. G. Seebauer
Keyword(s):  
Conceptual Framework ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Activation Energies ◽  
Thermal Budget ◽  
Kinetic Effects ◽  
Physical Phenomena

AbstractUp to now, kinetic effects in rapid thermal processing (RTP) have been assessed qualitatively and rather vaguely through the concept of thermal budget. We discuss the shortcomings associated with thermal budget and present an alternate conceptual framework that explicitly treats selectivity between desired and undesired physical phenomena. This framework is quite simple and is intended for rapidly assessing the qualitative effects of various heating programs. From a purely kinetic perspective, selecting the best program involves only comparing the activation energies for the desired and undesired rate phenomena. We cite examples where application of the thermal budget approach gives incorrect guidance for minimizing the undesired process. Such deficiencies are rectified by the framework presented here.

Ultra Low Thermal Budget Rapid Thermal Processing for Thin Gate Oxide Dielectrics: Reduction of Suboxide Transition Regions in Low Temperature Processed Si/SiO2 Structures by A 900°C 30 Second Rapid Thermal Anneal

1997 ◽  
Vol 470 ◽  
Author(s):  
G. Lucovsky ◽  
B. Hinds
Keyword(s):  
Low Temperature ◽  
Thermal Processing ◽  
Gate Dielectric ◽  
Rapid Thermal Processing ◽  
Rapid Thermal Anneal ◽  
Thermal Budget ◽  
Kinetic Effects ◽  
C 30 ◽  
Thin Gate Oxide ◽  
Low Thermal Budget

ABSTRACTDevice quality gate dielectric heterostructures have been prepared using a three step plasma/rapid thermal sequence [1] in which kinetic effects determine the time-temperature aspects of the processing. The steps for forming the interface and for depositing dielectric layers have been performed at low temperature, ∼300°C, by plasma-assisted processing. Following this a low rapid thermal anneal (RTA) provides interface and bulk dielectric chemical and structural relaxations, thereby yielding device performance and reliability essentially the same as obtained using higher thermal budget conventional or rapid thermal processing.

The Redistribution of Impurities Under RTP for Polysilicon Capped Silicon

1987 ◽  
Vol 92 ◽  
Author(s):  
R. S. Hockett
Keyword(s):  
Thermal Processing ◽  
High Performance ◽  
Rapid Thermal Processing ◽  
Bipolar Transistors ◽  
Thermal Budget ◽  
Shallow Junction ◽  
Low Level ◽  
Alternative Processing

ABSTRACTRapid Thermal Processing is being evaluated in the IC industry as a way to meet the thermal budget requirements of reduced scaling in high performance Si IC's. As scaling is reduced and alternative processing is used, the study of low level interfacial impurities is expected to become more important. An example is presented here for the redistribution of interfacial impurities under RTP for polysilicon capped silicon similar to that proposed for shallow junction bipolar transistors.

Understanding the Impact of Batch vs. Single Wafer in Thermal Processing Using Cost of Ownership Analysis

1997 ◽  
Vol 470 ◽  
Author(s):  
S. Hossain-Pas ◽  
M. F. Pas
Keyword(s):  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Chemical Vapor ◽  
Financial Impact ◽  
Enabling Technology ◽  
Thermal Budget ◽  
Thermal Chemical Vapor Deposition ◽  
Cost Of Ownership ◽  
Technology Nodes ◽  
The Impact

IntroductionBatch thermal processing satisfies device requirements for 0.5μm and larger technology nodes for silicon semiconductor manufacturing and continues to satisfy these requirements as feature sizes decrease beyond 0.5μm to 0.35μm. At the transition from 0.35μm to 0.25μm, source/drain (S/D) anneal, TiSi form, and TiSi anneal require rapid thermal processing (RTP) because of improvements in thermal budget, lateral dopant diffusion, and in silicidation, with RTP. RTP and rapid thermal chemical vapor deposition (RTCVD) become enabling technology for devices at 0.25μm and smaller technology nodes.A cost of ownership (CoO) analysis provides a comparison between the financial impact of alternatives and helps in determining the lowest cost answer for that process, assuming all other process parameters can be met equally by all alternatives. This report analyzes primary cost drivers, their importance within each analysis, and potential for improvements which may cause a significant change in CoO values at 200mm.

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