microelectronic fabrication
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2020 ◽  
Vol 2020 ◽  
pp. 1-12
Author(s):  
Gavin Lennon ◽  
Shannon Willox ◽  
Ragini Ramdas ◽  
Scott J. Funston ◽  
Matthew Klun ◽  
...  

During the construction of recording head devices, corrosion of metal features and subsequent deposition of corrosion by-products have been observed. Previous studies have determined that the use of N-methylpyrrolidone (NMP) may be a contributing factor. In this study, we report the use of a novel multiplatform analytical approach comprising of pH, liquid chromatography/UV detection (LC/UV), inductively coupled plasma optical emission spectroscopy (ICP-OES), and LC/mass spectrometry (LC/MS) to demonstrate that reaction conditions mimicking those of general photoresist removal processes can invoke the oxidation of NMP during the photolithography lift-off process. For the first time, we have confirmed that the oxidation of NMP lowers the pH, facilitating the dissolution of transition metals deposited on wafer substrates during post-mask and pre-lift-off processes in microelectronic fabrication. This negatively impacts upon the performance of the microelectronic device. Furthermore, it was shown that, by performing the process in an inert atmosphere, the oxidation of NMP was suppressed and the pH was stabilized, suggesting an affordable modification of the photolithography lift-off stage to enhance the quality of recording heads. This novel study has provided key data that may have a significant impact on current and future fabrication process design, optimization, and control. Results here suggest the inclusion of pH as a key process input variable (KPIV) during the design of new photoresist removal processes.


2020 ◽  
Vol 10 (1) ◽  
pp. 87
Author(s):  
Juan Hinojosa ◽  
Félix Lorenzo Martínez Viviente ◽  
Vicente Garcerán Hernández ◽  
Ramón Ruiz Merino

We present a method for the teaching of Electronics, defined as the scientific discipline that studies the movement and behavior of electrons in semiconductor materials and in vacuum. Electronics can be considered as a science with a solid physical foundation. Within the field of Electronics there are different disciplines, some of them can be considered as pure science, and some others are more oriented to applications. Our methodology has been applied to the wide range of courses that develop the different approaches to Electronics, from the physics of semiconductors or the physics of microelectronic devices, generally taught at physics faculties, to microelectronic fabrication technology or microelectronic design, subjects that typically have a more application oriented character. To ensure an effective learning of these subjects, a teaching-learning model has been established. This model involves the criteria for developing the programs and defining objectives, as well as the development of a series of activities in which the methods, techniques, forms of presentation and didactic resources most useful to achieve the proposed objectives will be used, and an evaluation system that assesses the effectiveness of the educational process and detects its anomalies.


2018 ◽  
Vol 2018 ◽  
pp. 1-8 ◽  
Author(s):  
Alfredo D. Bobadilla ◽  
Leonidas E. Ocola ◽  
Anirudha V. Sumant ◽  
Michael Kaminski ◽  
Jorge M. Seminario

Microelectronic fabrication of Si typically involves high-temperature or high-energy processes. For instance, wafer fabrication, transistor fabrication, and silicidation are all above 500°C. Contrary to that tradition, we believe low-energy processes constitute a better alternative to enable the industrial application of single-molecule devices based on 2D materials. The present work addresses the postsynthesis processing of graphene at unconventional low temperature, low energy, and low pressure in the poly methyl-methacrylate- (PMMA-) assisted transfer of graphene to oxide wafer, in the electron-beam lithography with PMMA, and in the plasma patterning of graphene with a PMMA ribbon mask. During the exposure to the oxygen plasma, unprotected areas of graphene are converted to graphene oxide. The exposure time required to produce the ribbon patterns on graphene is 2 minutes. We produce graphene ribbon patterns with ∼50 nm width and integrate them into solid state and liquid gated transistor devices.


2017 ◽  
Vol 8 ◽  
pp. 1231-1237 ◽  
Author(s):  
Carlos Angulo Barrios ◽  
Víctor Canalejas-Tejero

We report on a top-down method for the controlled fabrication of three-dimensional (3D), closed, thin-shelled, hollow nanostructures (nanocages) on planar supports. The presented approach is based on conventional microelectronic fabrication processes and exploits the permeability of thin metal films to hollow-out polymer-filled metal nanocages through an oxygen-plasma process. The technique is used for fabricating arrays of cylindrical nanocages made of thin Al shells on silicon substrates. This hollow metal configuration features optical resonance as revealed by spectral reflectance measurements and numerical simulations. The fabricated nanocages were demonstrated as a refractometric sensor with a measured bulk sensitivity of 327 nm/refractive index unit (RIU). The pattern design flexibility and controllability offered by top-down nanofabrication techniques opens the door to the possibility of massive integration of these hollow 3D nano-objects on a chip for applications such as nanocontainers, nanoreactors, nanofluidics, nano-biosensors and photonic devices.


2017 ◽  
Vol 5 (5) ◽  
pp. 207-213
Author(s):  
Vijay Kumar

In recent years, applications of wireless sensor networks (WSNs) have been improved due to its vast potential to connect the physical world to the virtual world. Also, a progress in microelectronic fabrication technology reduces cost of developed portable wireless sensor nodes. Faults occurring to sensor nodes are familiar due to the sensor device itself and the harsh environment where the sensor nodes are deploy. WSNs is mainly affect by the crash of sensor nodes. Possibility of sensor node failure increases with increase number of sensors. Wireless sensor networks have been recognized, at an early stage in their development, to be a useful measurement technology for environmental monitoring applications. Based on their independence from accessible infrastructures, wireless sensor networks can be deploy in virtually any location and provide sensor samples in a spatial and temporal resolution.


MRS Advances ◽  
2017 ◽  
Vol 2 (57) ◽  
pp. 3537-3546 ◽  
Author(s):  
Delphine Dean ◽  
Katherine Hafner ◽  
Xue Chen ◽  
Brian Kirkland ◽  
Theresa Hafner ◽  
...  

ABSTRACTDetermining what external stimuli influence cell differentiation, morphology, and growth continues to be a focus on many research groups to meet the healthcare Grand Challenges. While prior work has shown the influence of stiffness, surface chemistry and topography, these parameters often change in tandem, making it difficult to delineate the role of an individual component. This study examined the possible incorporation of microelectronic processing to produce reusable substrates for cell guidance studies. Subsequent plating of substrates cleaned with methods common in a microelectronic fabrication process showed complex responses including migration. Optical characterization of surfaces after cleaning showed remaining cellular debris that could be removed through the incorporation of a piranha solution. The micro patterned substrates did allow controlled comparison between dental pulp stem cells and osteoblast cells. The dental pulp cells did not show any cell alignment or cell proliferation (as indicated by cell density) with the isotropic or anisotropic micropatterns on the initial plating. The osteoblast cells (control) only aligned with the lines and not any of the other patterns (dots, holes or hexagons).


2016 ◽  
Vol 2016 ◽  
pp. 1-13 ◽  
Author(s):  
Gerald Gerlach ◽  
Karl Maser

Thermal oxidation of silicon belongs to the most decisive steps in microelectronic fabrication because it allows creating electrically insulating areas which enclose electrically conductive devices and device areas, respectively. Deal and Grove developed the first model (DG-model) for the thermal oxidation of silicon describing the oxide thickness versus oxidation time relationship with very good agreement for oxide thicknesses of more than 23 nm. Their approach named as general relationship is the basis of many similar investigations. However, measurement results show that the DG-model does not apply to very thin oxides in the range of a few nm. Additionally, it is inherently not self-consistent. The aim of this paper is to develop a self-consistent model that is based on the continuity equation instead of Fick’s law as the DG-model is. As literature data show, the relationship between silicon oxide thickness and oxidation time is governed—down to oxide thicknesses of just a few nm—by a power-of-time law. Given by the time-independent surface concentration of oxidants at the oxide surface, Fickian diffusion seems to be neglectable for oxidant migration. The oxidant flux has been revealed to be carried by non-Fickian flux processes depending on sites being able to lodge dopants (oxidants), the so-called DOCC-sites, as well as on the dopant jump rate.


2014 ◽  
Vol 925 ◽  
pp. 533-537 ◽  
Author(s):  
Balakrishnan Sharma Rao ◽  
Uda Hashim

We present a new design of biochip for application in clinical diagnostics by using a conventional method of pattern transfer process in microelectronic fabrication. Although there are many advanced techniques available to produce nanostructures such as electron beam lithography (EBL), ion-beam lithography (IBL), focused ion beam milling and nanoimprint lithography, these methods often requires high maintenance costs, time consuming and very complicated compared to conventional photolithography. This conventional technique is still a good choice for a feature size more than 1 micron. In this work, microbridge and microgap design from chrome mask are transferred on silicon wafer to fabricate a biochip. The pattern transfer of the first mask of electrode is presented in this paper to test the repeatability of pattern transfer during photolithography process. Therefore, during the process, the resolution and precise alignment factors are taken into account to prevent circuit and device failure. Post-exposure bake time and development limitations are recorded for both designs.


2013 ◽  
Vol 404 ◽  
pp. 67-71 ◽  
Author(s):  
Zaliman Sauli ◽  
Vithyacharan Retnasamy ◽  
Fairul Afzal Ahmad Fuad ◽  
Phaklen Ehkan ◽  
Moganraj Palianysamy ◽  
...  

Reactive Ion Etch (RIE) has been an important process in the world of microelectronic fabrication. Focus of this preliminary study is on how RIE affects the grain size of aluminum film which is fabricated on substrates. RIE parameters are varied to obtain 16 different recipes which are done using Design of Experiment. Grain size of the samples is recorded for all 16 samples before and after RIE treatment. This produces results that can be compared to obtain the effect of RIE on the aluminum film. Results show that RIE affects the mean grain size of the aluminum film as it increases after RIE treatment.


2012 ◽  
Vol 187 ◽  
pp. 245-248
Author(s):  
Chung Kyung Jung ◽  
Sung Wook Joo ◽  
Sang Wook Ryu ◽  
S. Naghshineeh ◽  
Yang Lee ◽  
...  

Plasma dry etching processes are commonly used to fabricate sidewalls of trenches and vias for copper / low-k dual damascene devices. Typically, some polymers remain in the trench and at the via top and sidewall. Other particulate etch residues are may remained in the bottom and on the sidewalls of vias. Generally, the particulate consists of mixtures of copper oxide with polymers. The polymers on the sidewalls and the particulate residues at the bottom of vias must be removed prior to the next process step. Small amounts of polymer are intentionally left on the sidewalls of trenches and vias during the etching in order to achieve a vertical profile and to protect the low-k materials under the etching mask. Until now, the industry has relied mainly on organic solvent containing mixtures to clean etch / ash residues from such devices. The effectiveness of available residue removers varies with the specific process and also depends on which new integration materials are used. New materials typically include Cu, TaN, low-k dielectrics and others [1-. Solvent content is thought to aid the removal of polymer residues and particulates produced during plasma dry etching processes. Therefore, in the past we have used a residue remover which contains DMAC (dimethylacetamide). But the use of DMAC is banned in microelectronic fabrication facilities in Europe because of its toxicity. Thus we wanted to find and evaluate a DMAC-free residue remover for removing polymer residues while maintaining high selectivity to the copper and ILD films.


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