YMnO3 and YbMnO3 Thin Films for fet type FeRam Application

1999 ◽  
Vol 574 ◽  
Author(s):  
Norifumi Fujimura ◽  
Takeshi Yoshimura ◽  
Daisuke Ito ◽  
Taichiro Ito
Keyword(s):  
Buffer Layer ◽  
Field Effect Transistor ◽  
Random Access ◽  
Sweep Rate ◽  
Si Substrates ◽  
Window Width ◽  
Crystalline Films ◽  
Effect Transistor ◽  
Ferroelectric Hysteresis ◽  
Ferroelectric Random Access Memories

AbstractWe have been proposing the use of RMnO3 (R: rare earth elements) films for metalferroelectric- semiconductor field effect transistor (MFSFET)-type ferroelectric random access memories (Ferroelectric RAMs). This report describes the progress of YMnO3 and YbMnO3 films for FET type FeRAM application. Although highly (0001)-oriented YMnO3 films are easily obtained on a MgO, ZnO/Sapphire, Pt/Sapphire and Pt/Si substrates, it was very hard to obtain the crystalline films directly on Si or on SiO2/Si substrate. A Y-Mn-O buffer layer improved the crystallinity of the YMnO3 films on Si, and we got the C-V curve with ferroelectric hysteresis. The real ferroelectric component responsible for the C-V hysteresis was calculated to be just 8.4 nC/cm2 by pulse measurements. On the other hand, Y2O3 buffer layer drastically improved the dielectric properties. The window width of the C-V hysteresis does not change by changing the sweep rate and measurement frequency.

Fabrication of AlGaN/GaN HFET with a High Breakdown Voltage on 4-inch Si (111) Substrate by MOVPE

2006 ◽  
Vol 955 ◽  
Author(s):  
Yuki Niiyama ◽  
Sadahiro Kato ◽  
Yoshihiro Sato ◽  
Masayuki Iwami ◽  
Jiang Li ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Breakdown Voltage ◽  
Field Effect Transistor ◽  
Drain Current ◽  
Growth Pressure ◽  
Si Substrates ◽  
Effect Transistor ◽  
Gan Heterostructure ◽  
Gan Film ◽  
Gan Buffer Layer

ABSTRACTWe investigated an AlGaN/GaN heterostructure field effect transistor (HFET) on Si substrates using a multi-wafer metalorganic vapor phase epitaxy (MOVPE) system. It was confirmed that a GaN film with smooth surface and without any crack was obtained. To increase a resistance of a GaN buffer layer, the carbon (C) -doping was carried out by controlling the V/III ratio and the growth pressure. The breakdown voltage of the buffer layer was dramatically improved by introducing the C. As a result, the breakdown voltage was about 900 V when the C concentration was about ∼8×1018 cm−3. After while, an AlGaN/GaN heterojunction FET (HFET) on a C-doped GaN buffer layer was fabricated. We achieved the breakdown voltage of over 1000 V and the maximum drain current of over 150 mA/mm, respectively. It was found that the C doped buffer layer is very effective for improving the breakdown voltage of AlGaN/GaN HFETs.

Control of Threshold Voltage for Top-Gated Ambipolar Field-Effect Transistor by Gate Buffer Layer

2016 ◽  
Vol 8 (27) ◽  
pp. 17416-17420 ◽  
Author(s):  
Dongyoon Khim ◽  
Eul-Yong Shin ◽  
Yong Xu ◽  
Won-Tae Park ◽  
Sung-Ho Jin ◽  
...  
Keyword(s):  
Buffer Layer ◽  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor

Design and Analysis of Metal-Oxide-Semiconductor Field-Effect Transistor-Based Capacitorless One-Transistor Embedded Dynamic Random-Access Memory with Double-Polysilicon Layer Using Grain Boundary for Hole Storage

2020 ◽  
Vol 20 (11) ◽  
pp. 6596-6602
Author(s):  
Won Douk Jang ◽  
Young Jun Yoon ◽  
Min Su Cho ◽  
Jun Hyeok Jung ◽  
Sang Ho Lee ◽  
...  
Keyword(s):  
Grain Boundary ◽  
Field Effect Transistor ◽  
Random Access ◽  
Random Access Memory ◽  
Metal Oxide Semiconductor ◽  
Dynamic Random Access Memory ◽  
Oxide Semiconductor ◽  
Access Memory ◽  
Polysilicon Layer ◽  
Effect Transistor

In this work, a capacitorless one-transistor embedded dynamic random-access memory based on a metal-oxide-semiconductor field-effect transistor with a double-polysilicon layer structure has been proposed and investigated using technology computer-aided design simulation. By using the grain boundary for hole storage, a higher sensing margin of 4.35 /μA//μm is achieved compared to that without using the grain boundary. Furthermore, the proposed device achieves a superior retention time of 555.77 /μs, which is reasonable from the viewpoint of its application in embedded systems (>100 /μs), even at a high temperature of 358 K. For higher device reliability, the effect of the grain boundary on the capacitorless one-transistor embedded dynamic random-access memory is analyzed with different trap distributions. The proposed capacitorless one-transistor embedded dynamic random-access memory cell exhibited superior reliability in terms of retention time (>100 /μs).

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