Fabrication of RR-P3HT-based TFTs using low-temperature PECVD silicon nitride passivation

2005 ◽  
Vol 871 ◽  
Author(s):  
Sarswati Koul ◽  
Yuri Vygranenko ◽  
Flora Li ◽  
Andrei Sazonov ◽  
Arokia Nathan
Keyword(s):  
Polymer Film ◽  
Gate Dielectric ◽  
Dielectric Material ◽  
Film Formation ◽  
Substrate Surface ◽  
Chemical Vapor ◽  
Dielectric Materials ◽  
Processing Technique ◽  
Organic Thin Film ◽  
Film Adhesion

AbstractRegioregular poly(3-hexylthiophene) (RR-P3HT) is a commercially available semiconducting polymer. Its high processability makes it favorable for fabrication of organic thin film transistors (OTFTs). Depending on the processing technique and device configuration, the field effect mobility of this polymer ranges from 0.01 to 0.1 cm2/Vs. The mobility also shows a correlation with the choice of gate dielectric material. The most commonly reported dielectric materials for OTFTs are SiO2, Al2O3 and Ta2O5. In this work, we report a new fully encapsulated top-gate RR-P3HT-based TFT structure with a-SiNx implemented as the gate dielectric and passivation material. The fabrication process enables realization of discrete transistors and transistor circuits through four consecutive photolithographic steps. The process is compatible for various substrates including Corning glass, Si wafers, and any appropriate plastic substrates. This paper addresses a number of critical technological issues such as substrate surface treatment to improve film adhesion, optimal spin coating conditions for uniform polymer film formation, preparation of device quality a-SiNx films by plasma-enhanced chemical vapor deposition (PECVD) at 75°C substrate temperature, and a tailored etch process for patterning of the polymer film. Current-voltage characteristics of the fabricated transistors are analyzed to evaluate the quality of the polymer/a-SiNx interface.

Improvement in Gate Dielectric Quality of Ultra Thin a: SiN:H MNS Capacitor by Hydrogen Etching of the Substrate

2002 ◽  
Vol 716 ◽  
Author(s):  
Parag C. Waghmare ◽  
Samadhan B. Patil ◽  
Rajiv O. Dusane ◽  
V.Ramgopal Rao
Keyword(s):  
Silicon Nitride ◽  
Gate Dielectric ◽  
Substrate Surface ◽  
Scaling Limit ◽  
Tunneling Current ◽  
Chemical Vapor ◽  
Poor Performance ◽  
State Density ◽  
Direct Tunneling Current

AbstractTo extend the scaling limit of thermal SiO2, in the ultra thin regime when the direct tunneling current becomes significant, members of our group embarked on a program to explore the potential of silicon nitride as an alternative gate dielectric. Silicon nitride can be deposited using several CVD methods and its properties significantly depend on the method of deposition. Although these CVD methods can give good physical properties, the electrical properties of devices made with CVD silicon nitride show very poor performance related to very poor interface, poor stability, presence of large quantity of bulk traps and high gate leakage current. We have employed the rather newly developed Hot Wire Chemical Vapor Deposition (HWCVD) technique to develop the a:SiN:H material. From the results of large number of optimization experiments we propose the atomic hydrogen of the substrate surface prior to deposition to improve the quality of gate dielectric. Our preliminary results of these efforts show a five times improvement in the fixed charges and interface state density.

scholarly journals Preparation and Application of Organic-Inorganic Nanocomposite Materials in Stretched Organic Thin Film Transistors

Polymers ◽  
2020 ◽  
Vol 12 (5) ◽  
pp. 1058
Author(s):  
Yang-Yen Yu ◽  
Cheng-Huai Yang
Keyword(s):  
Thin Film ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Dielectric Materials ◽  
Dielectric Constants ◽  
Inorganic Nanoparticles ◽  
Semiconductor Layer ◽  
Organic Thin Film ◽  
Switching Current ◽  
High Dielectric

High-transparency soluble polyimide with COOH and fluorine functional groups and TiO2-SiO2 composite inorganic nanoparticles with high dielectric constants were synthesized in this study. The polyimide and inorganic composite nanoparticles were further applied in the preparation of organic-inorganic hybrid high dielectric materials as the gate dielectric for a stretchable transistor. The optimal ratio of organic and inorganic components in the hybrid films was investigated. In addition, Jeffamine D2000 and polyurethane were added to the gate dielectric to improve the tensile properties of the organic thin film transistor (OTFT) device. PffBT4T-2OD was used as the semiconductor layer material and indium gallium liquid alloy as the upper electrode. Electrical property analysis demonstrated that the mobility could reach 0.242 cm2·V−1·s−1 at an inorganic content of 30 wt.%, and the switching current ratio was 9.04 × 103. After Jeffamine D2000 and polyurethane additives were added, the mobility and switching current could be increased to 0.817 cm2·V−1·s−1 and 4.27 × 105 for Jeffamine D2000 and 0.562 cm2·V−1·s−1 and 2.04 × 105 for polyurethane, respectively. Additives also improved the respective mechanical properties. The stretching test indicated that the addition of polyurethane allowed the OTFT device to be stretched to 50%, and the electrical properties could be maintained after stretching 150 cycles.

Ion Beam Induced Chemical Vapor Deposition of Dielectric Materials

2000 ◽  
Vol 624 ◽  
Author(s):  
H.D. Wanzenboeck ◽  
A. Lugstein ◽  
H. Langfischer ◽  
E. Bertagnolli ◽  
M. Gritsch ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Focused Ion Beam ◽  
Dielectric Material ◽  
Ion Beam ◽  
Chemical Vapor ◽  
Deposition Process ◽  
Dielectric Materials ◽  
Direct Writing ◽  
Scan Time

ABSTRACTDirect writing by locally induced chemical vapor deposition has been applied to direct-write tailor-made microstructures of siliconoxide for modification and repair of microelectronic circuits. Focused ion beam (FIB) tools are used for locally confined deposition of dielectric material in the deep sub-µm range. State-of-the-art procedures typically provide insufficient dielectrics with high leakage currents and low breakdown voltage. The detailed investigation of the deposition mechanisms in this study proposes an approach to significantly improve dielectric material properties. Siloxane and oxygen as volatile precursors introduced in a vacuum chamber are used to deposit siliconoxide at ambient temperatures on various substrates such as Si, GaAs, or metals. The deposition process was initiated by a focused Ga+-beam. As elementary electronic test vehicles for a systematic electrical investigation ion beam induced depositions in of capacitor architectures are applied. The chemical composition of the layers is investigated by secondary ion mass spectroscopy (SIMS) and reveals effects of atomic mixing at the interfaces. The variation of process parameters such as ion energy and ion dose, scan time and delay time lead to a better understanding of the mechanisms. The composition of the precursor gas mixture is of significant influence on insulating properties. The results demonstrate that optimized FIB-induced deposition of dielectrics offers a new window for in-situ post-processing of integrated circuits

Ultra-Thin Zirconium Oxide Films Deposited by Rapid Thermal Chemical Vapor Deposition (RT-CVD) as Alternative Gate Dielectric

2001 ◽  
Vol 670 ◽  
Author(s):  
Jane P. Chang ◽  
You-Sheng Lin
Keyword(s):  
Dielectric Constant ◽  
Chemical Vapor Deposition ◽  
Vapor Deposition ◽  
Gate Dielectric ◽  
Dielectric Material ◽  
Chemical Vapor ◽  
Oxide Semiconductor ◽  
X Ray ◽  
Good Thermal Stability ◽  
Thermal Chemical Vapor Deposition

ABSTRACTZrO2 ([.kappa]∼ 18) was deposited on Si(100) wafers by rapid thermal chemical vapor deposition (RT-CVD) process to replace SiO2 as the gate dielectric material in metal-oxide- semiconductor devices for its high dielectric constant, good thermal stability on silicon, and large bandgap. The deposited films are nearly stoichiometric, amorphous, uniform, and highly smooth, as determined by X-ray photoemission spectroscopy, X-ray diffraction, ellipsometry, and atomic force microscopy. The high resolution transmission electron microscopy (TEM) image shows an interfacial ZrSiO4 layer between ZrO2 and the silicon substrate, and this interfacial layer is verified by thermodynamic calculations and etching resistance measured at the interface. Excellent step coverage was observed for depositing ZrO2 on nanometer scale features with an aspect ratio of 4. The dielectric constant of RTCVD ZrO2 was 15-18, with small C-V hysteresis and low leakage current.

Poly(vinyl acetate)/Clay Nanocomposite Materials for Organic Thin Film Transistor Application

2008 ◽  
Vol 8 (5) ◽  
pp. 2676-2679 ◽  
Author(s):  
B. J. Park ◽  
J. H. Sung ◽  
J. H. Park ◽  
J. S. Choi ◽  
H. J. Choi
Keyword(s):  
Thin Film ◽  
Vinyl Acetate ◽  
Gate Dielectric ◽  
Thin Film Transistor ◽  
Fracture Morphology ◽  
Dielectric Materials ◽  
Nanocomposite Materials ◽  
Clay Nanocomposites ◽  
Organic Thin Film ◽  
Organic Thin Film Transistor

Nanocomposite materials of poly(vinyl acetate) (PVAc) and organoclay were fabricated, in order to be utilized as dielectric materials of the organic thin film transistor (OTFT). Spin coating condition of the nanocomposite solution was examined considering shear viscosity of the composite materials dissolved in chloroform. Intercalated structure of the PVAc/clay nanocomposites was characterized using both wide-angle X-ray diffraction and TEM. Fracture morphology of the composite film on silicon wafer was also observed by SEM. Dielectric constant (4.15) of the nanocomposite materials shows that the PVAc/clay nanocomposites are applicable for the gate dielectric materials.

PENTACENE-BASED ORGANIC THIN FILM TRANSISTOR WITH SiO2 GATE DIELECTRIC

2015 ◽  
Vol 22 (03) ◽  
pp. 1550038 ◽  
Author(s):  
AHMET DEMIR ◽  
SADIK BAĞCI ◽  
SAIT EREN SAN ◽  
ZEKERIYA DOĞRUYOL
Keyword(s):  
Thin Film ◽  
Thermal Evaporation ◽  
Gate Dielectric ◽  
Dielectric Material ◽  
Thin Film Transistor ◽  
Organic Thin Film ◽  
Organic Thin Film Transistor ◽  
Thermal Evaporation Method ◽  
Threshold Voltages ◽  
Thin Film Layer

An organic thin film transistor (OTFT) based on pentacene was fabricated with SiO 2 as the gate dielectric material. We have investigated the effects of the thickness of pentacene layer and the organic semiconductor (OSC) material on OTFT devices at two different thicknesses. Au metal was deposited for gate, source and drain contacts of the device by using thermal evaporation method. Pentacene thin film layer was also prepared with thermal evaporation. Our study has shown that the change in pentacene thickness makes a noteworthy difference on the field effect mobility (μFET), values, threshold voltages (VT) and on/off current ratios (Ion/Ioff). OTFTs exhibited saturation at the order of μFET of 3.92 cm2/Vs and 0.86 cm2/Vs at different thicknesses. Ion/Ioff and VT are also thickness dependent. Ion/Ioff is 1 × 103, 2 × 102 and VT is 15 V, 27 V of 40 nm and 60 nm, respectively. The optimized thickness of the pentacene layer was found as 40 nm. The effect of the OSC layer thickness on the OTFT performance was found to be conspicuous.

scholarly journals Simulations of the CNFETs using different high-k gate dielectrics

2020 ◽  
Vol 9 (3) ◽  
pp. 943-949
Author(s):  
Ankita Dixit ◽  
Navneet Gupta
Keyword(s):  
Carbon Nanotube ◽  
Field Effect ◽  
Gate Dielectric ◽  
Dielectric Material ◽  
Gate Dielectrics ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Dielectric Materials ◽  
High K ◽  
Gate Dielectric Material

In this paper we presented the analysis of Carbon Nanotube Field Effect Transistors (CNFETs) using various high-k gate dielectric materials. The objective of this work was to choose the best possible material for gate dielectric. This paper also presented the study on the effect of thickness of gate dielectric on the performance of the device. For the analysis (19, 0) CNT was considered because the diameter of (19, 0) CNT is 1.49nm and the CNFETs have been fabricated with the CNT diameter of ~1.5nm. It has been observed that La2O3 is the best gate dielectric material followed by HfO2 and ZrO2. It was also observed that as thickness of gate dielectric material reduces, drain current of CNFET increases. The outcomes of this study matches with the analytical results and hence confirm the results

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