scholarly journals Logic-in-Memory Inverter Based on a Silicon Nanowire Feedback Field-Effect Transistor

2022 ◽  
Author(s):  
Eunwoo Baek ◽  
Jaemin Son ◽  
Kyoungah Cho ◽  
Sangsig Kim
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Supply Voltage ◽  
Silicon Nanowire ◽  
Input Voltage ◽  
Oxide Semiconductor ◽  
High Voltage Gain ◽  
Static Power ◽  
Effect Transistor

Abstract In this paper, we propose a logic-in-memory (LIM) inverter comprising a silicon nanowire (SiNW) n-channel feedback field-effect transistor (n-FBFET) and a SiNW p-channel metal oxide semiconductor field-effect transistor (p-MOSFET). Further, we investigated the hybrid logic and memory operations of the inverter using mixed-mode technology computer-aided design simulations. Our LIM inverter exhibited a high voltage gain of 296.8 (V/V) when transitioning from logic ‘1’ to ‘0’ and 7.9 (V/V) when transitioning from logic ‘0’ to ‘1’, while holding calculated logic at zero input voltage. The energy band diagrams of the n-FBFET structure demonstrated that the holding operation of the inverter was implemented by controlling the positive feedback loop. Moreover, the output logic can remain constant without any supply voltage, resulting in zero static power consumption.

Effect of Metal - Silicon Nanowire Contacts on the Performance of Accumulation Metal Oxide Semiconductor Field Effect Transistor

2008 ◽  
Vol 1144 ◽  
Author(s):  
Pranav Garg ◽  
Yi Hong ◽  
Md. Mash-Hud Iqbal ◽  
Stephen J. Fonash
Keyword(s):  
Metal Oxide ◽  
Silicon Nanowires ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Silicon Nanowire ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Manufacturing Cost ◽  
Effect Transistor ◽  
The Impact

ABSTRACTRecently, we have experimentally demonstrated a very simply structured unipolar accumulation-type metal oxide semiconductor field effect transistor (AMOSFET) using grow-in-place silicon nanowires. The AMOSFET consists of a single doping type nanowire, metal source and drain contacts which are separated by a partially gated region. Despite its simple configuration, it is capable of high performance thereby offering the potential of a low manufacturing-cost transistor. Since the quality of the metal/semiconductor ohmic source and drain contacts impacts AMOSFET performance, we repot here on initial exploration of contact variations and of the impact of thermal process history. With process optimization, current on/off ratios of 106 and subthreshold swings of 70 mV/dec have been achieved with these simple devices

scholarly journals 3.3-kV 4H-SiC Split-Gate DMOSFET with Floating p+ Polysilicon for High-Frequency Applications

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 659
Author(s):  
Kyuhyun Cha ◽  
Jongwoon Yoon ◽  
Kwangsoo Kim
Keyword(s):  
High Frequency ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Gate Oxide ◽  
Oxide Semiconductor ◽  
Static Characteristics ◽  
Gate Structure ◽  
Effect Transistor ◽  
Switching Characteristics

A split-gate metal–oxide–semiconductor field-effect transistor (SG-DMOSFET) is a well-known structure used for reducing the gate–drain capacitance (CGD) to improve switching characteristics. However, SG-DMOSFETs have problems such as the degradation of static characteristics and a high gate-oxide electric field. To solve these problems, we developed a SG-DMOSFET with floating p+ polysilicon (FPS-DMOSFET) and compared it with a conventional planar DMOSFET (C-DMOSFET) and a SG-DMOSFET through Technology Computer-Aided Design (TCAD) simulations. In the FPS-DMOSFET, floating p+ polysilicon (FPS) is inserted between the active gates to disperse the high drain voltage in the off state and form an accumulation layer over the entire junction field effect transistor (JFET) region, similar to a C-DMOSFET, in the on state. Therefore, the FPS-DMOSFET can minimize the degradation of static characteristics such as the breakdown voltage (BV) and specific on resistance (RON,SP) in the split-gate structure. Consequently, the FPS-DMOSFET can shorten the active gate length and achieve a gate-to-drain capacitance (CGD) that is less than those of the C-DMOSFET and SG-DMOSFET by 48% and 41%, respectively. Moreover, the high-frequency figure of merit (HF-FOM = RON,SP × CGD) of the FPS-DMOSFET is lower than those of the C-DMOSFET and SG-DMOSFET by 61% and 49%, respectively. In addition, the FPS-DMOSFET shows an EMOX of 2.1 MV/cm, which guarantees a gate oxide reliability limit of 3 MV/cm. Therefore, the proposed FPS-DMOSFET is the most appropriate device to be used in high-voltage and high-frequency electronic applications.

scholarly journals Deep Submicron EGFET Based on Transistor Association Technique for Chemical Sensing

Sensors ◽  
2019 ◽  
Vol 19 (5) ◽  
pp. 1063 ◽  
Author(s):  
Salvatore Pullano ◽  
Nishat Tasneem ◽  
Ifana Mahbub ◽  
Samira Shamsir ◽  
Marta Greco ◽  
...  
Keyword(s):  
Aspect Ratio ◽  
Power Consumption ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Supply Voltage ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Voltage Sensitivity ◽  
Current Sensitivity ◽  
Effect Transistor

Extended-gate field-effect transistor (EGFET) is an electronic interface originally developed as a substitute for an ion-sensitive field-effect transistor (ISFET). Although the literature shows that commercial off-the-shelf components are widely used for biosensor fabrication, studies on electronic interfaces are still scarce (e.g., noise processes, scaling). Therefore, the incorporation of a custom EGFET can lead to biosensors with optimized performance. In this paper, the design and characterization of a transistor association (TA)-based EGFET was investigated. Prototypes were manufactured using a 130 nm standard complementary metal-oxide semiconductor (CMOS) process and compared with devices presented in recent literature. A DC equivalence with the counterpart involving a single equivalent transistor was observed. Experimental results showed a power consumption of 24.99 mW at 1.2 V supply voltage with a minimum die area of 0.685 × 1.2 mm2. The higher aspect ratio devices required a proportionally increased die area and power consumption. Conversely, the input-referred noise showed an opposite trend with a minimum of 176.4 nVrms over the 0.1 to 10 Hz frequency band for a higher aspect ratio. EGFET as a pH sensor presented further validation of the design with an average voltage sensitivity of 50.3 mV/pH, a maximum current sensitivity of 15.71 mA1/2/pH, a linearity higher than 99.9%, and the possibility of operating at a lower noise level with a compact design and a low complexity.

scholarly journals Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs

Nanomaterials ◽  
2021 ◽  
Vol 11 (2) ◽  
pp. 309
Author(s):  
Jie Gu ◽  
Qingzhu Zhang ◽  
Zhenhua Wu ◽  
Jiaxin Yao ◽  
Zhaohao Zhang ◽  
...  
Keyword(s):  
Quantum Interference ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Silicon Nanowire ◽  
Ballistic Transport ◽  
Oxide Semiconductor ◽  
Body Effect ◽  
Gate Control ◽  
Effect Transistor ◽  
P Type

A 16-nm-Lg p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for normal MOSFET as well as the quantum transport at cryogenic has been investigated systematically. We demonstrate a good gate-control ability and body effect immunity at cryogenic for the GAA Si NW MOSFETs and observe the transport of two-fold degenerate hole sub-bands in the nanowire (110) channel direction sub-band structure experimentally. In addition, the pronounced ballistic transport characteristics were demonstrated in the GAA Si NW MOSFET. Due to the existence of spacers for the typical MOSFET, the quantum interference was also successfully achieved at lower bias.

scholarly journals T-Channel Field Effect Transistor with Three Input Terminals (Ti-TcFET)

Micromachines ◽  
2020 ◽  
Vol 11 (1) ◽  
pp. 64
Author(s):  
Zeqi Chen ◽  
Jianping Hu ◽  
Hao Ye ◽  
Zhufei Chu
Keyword(s):  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Structure Design ◽  
Channel Structure ◽  
Oxide Semiconductor ◽  
Back Gate ◽  
Effect Transistor ◽  
Current Characteristics

In this paper, a novel T-channel field effect transistor with three input terminals (Ti-TcFET) is proposed. The channel of a Ti-TcFET consists of horizontal and vertical sections. The top gate is above the horizontal channel, while the front gate and back gate are on either side of the vertical channel. The T-shaped channel structure increases the coupling area between the top gate and the front and back gates, which improves the ability of the gate electrodes to control the channel. What’s more, it makes the top gate have almost the same control ability for the channel as the front gate and the back gate. This unique structure design brings a unique function in that the device is turned on only when two or three inputs are activated. Silvaco technology computer-aided design (TCAD) simulations are used to verify the current characteristics of the proposed Ti-TcFET. The current characteristics of the device are theoretically analyzed, and the results show that the theoretical analysis agrees with the TCAD simulation results. The proposed Ti-TcFET devices with three input terminals can be used to simplify the complex circuits in a compact style with reduced counts of transistors compared with the traditional complementary metal–oxide–semiconductor/ fin field-effect transistors (CMOS/FinFETs) with a single input terminal and thus provides a new idea for future circuit designs.

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