scholarly journals 3.3-kV 4H-SiC Split-Gate DMOSFET with Floating p+ Polysilicon for High-Frequency Applications

Electronics ◽  
2021 ◽  
Vol 10 (6) ◽  
pp. 659
Author(s):  
Kyuhyun Cha ◽  
Jongwoon Yoon ◽  
Kwangsoo Kim
Keyword(s):  
High Frequency ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Gate Oxide ◽  
Oxide Semiconductor ◽  
Static Characteristics ◽  
Gate Structure ◽  
Effect Transistor ◽  
Switching Characteristics

A split-gate metal–oxide–semiconductor field-effect transistor (SG-DMOSFET) is a well-known structure used for reducing the gate–drain capacitance (CGD) to improve switching characteristics. However, SG-DMOSFETs have problems such as the degradation of static characteristics and a high gate-oxide electric field. To solve these problems, we developed a SG-DMOSFET with floating p+ polysilicon (FPS-DMOSFET) and compared it with a conventional planar DMOSFET (C-DMOSFET) and a SG-DMOSFET through Technology Computer-Aided Design (TCAD) simulations. In the FPS-DMOSFET, floating p+ polysilicon (FPS) is inserted between the active gates to disperse the high drain voltage in the off state and form an accumulation layer over the entire junction field effect transistor (JFET) region, similar to a C-DMOSFET, in the on state. Therefore, the FPS-DMOSFET can minimize the degradation of static characteristics such as the breakdown voltage (BV) and specific on resistance (RON,SP) in the split-gate structure. Consequently, the FPS-DMOSFET can shorten the active gate length and achieve a gate-to-drain capacitance (CGD) that is less than those of the C-DMOSFET and SG-DMOSFET by 48% and 41%, respectively. Moreover, the high-frequency figure of merit (HF-FOM = RON,SP × CGD) of the FPS-DMOSFET is lower than those of the C-DMOSFET and SG-DMOSFET by 61% and 49%, respectively. In addition, the FPS-DMOSFET shows an EMOX of 2.1 MV/cm, which guarantees a gate oxide reliability limit of 3 MV/cm. Therefore, the proposed FPS-DMOSFET is the most appropriate device to be used in high-voltage and high-frequency electronic applications.

scholarly journals 4H-SiC Double Trench MOSFET with Split Heterojunction Gate for Improving Switching Characteristics

Materials ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3554
Author(s):  
Jaeyeop Na ◽  
Jinhee Cheon ◽  
Kwangsoo Kim
Keyword(s):  
Dynamic Characteristics ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Switching Loss ◽  
Switching Speed ◽  
Polysilicon Gate ◽  
Effect Transistor ◽  
Switching Characteristics

In this paper, a novel 4H-SiC split heterojunction gate double trench metal-oxide-semiconductor field-effect transistor (SHG-DTMOS) is proposed to improve switching speed and loss. The device modifies the split gate double trench MOSFET (SG-DTMOS) by changing the N+ polysilicon split gate to the P+ polysilicon split gate. It has two separate P+ shielding regions under the gate to use the P+ split polysilicon gate as a heterojunction body diode and prevent reverse leakage `current. The static and most dynamic characteristics of the SHG-DTMOS are almost like those of the SG-DTMOS. However, the reverse recovery charge is improved by 65.83% and 73.45%, and the switching loss is improved by 54.84% and 44.98%, respectively, compared with the conventional double trench MOSFET (Con-DTMOS) and SG-DTMOS owing to the heterojunction.

Development of an SiC Multichip Phase-Leg Module for High-Temperature and High-Frequency Applications

2016 ◽  
Vol 13 (2) ◽  
pp. 39-50 ◽  
Author(s):  
Zheng Chen ◽  
Yiying Yao ◽  
Wenli Zhang ◽  
Dushan Boroyevich ◽  
Khai Ngo ◽  
...  
Keyword(s):  
High Temperature ◽  
High Frequency ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Operating Temperature ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Packaging Materials ◽  
Temperature Capability ◽  
Effect Transistor

This article presents a 1,200-V, 120-A silicon carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET) phase-leg module capable of operating at 200°C ambient temperature. Paralleling six 20-A MOSFET bare dice for each switch, this module outperforms the commercial SiC modules in higher operating temperature and lower package parasitics at a comparable power rating. The module's high-temperature capability is validated through the extensive characterizations of the SiC MOSFET, as well as the careful selections of suitable packaging materials. Particularly, the sealed-step-edge technology is implemented on the direct-bonded-copper substrates to improve the module's thermal cycling lifetime. Though still based on the regular wire-bond structure, the module is able to achieve over 40% reduction in the switching loop inductance compared with a commercial SiC module by optimizing its internal layout. By further embedding decoupling capacitors directly on the substrates, the module also allows SiC MOSFETs to be switched twice faster with only one-third turn-off overvoltages compared with the commercial module.

scholarly journals Design and Analysis of Heavily Doped n+ Pocket Asymmetrical Junction-Less Double Gate MOSFET for Biomedical Applications

2020 ◽  
Vol 10 (7) ◽  
pp. 2499 ◽  
Author(s):  
Namrata Mendiratta ◽  
Suman Lata Tripathi ◽  
Sanjeevikumar Padmanaban ◽  
Eklas Hossain
Keyword(s):  
Metal Oxide ◽  
Field Effect ◽  
Biomedical Applications ◽  
Field Effect Transistor ◽  
Gate Oxide ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Oxide Interface ◽  
Heavily Doped ◽  
Effect Transistor

The Complementary Metal-Oxide Semiconductor (CMOS) technology has evolved to a great extent and is being used for different applications like environmental, biomedical, radiofrequency and switching, etc. Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) based biosensors are used for detecting various enzymes, molecules, pathogens and antigens efficiently with a less time-consuming process involved in comparison to other options. Early-stage detection of disease is easily possible using Field-Effect Transistor (FET) based biosensors. In this paper, a steep subthreshold heavily doped n+ pocket asymmetrical junctionless MOSFET is designed for biomedical applications by introducing a nanogap cavity region at the gate-oxide interface. The nanogap cavity region is introduced in such a manner that it is sensitive to variation in biomolecules present in the cavity region. The analysis is based on dielectric modulation or changes due to variation in the bio-molecules present in the environment or the human body. The analysis of proposed asymmetrical junctionless MOSFET with nanogap cavity region is carried out with different dielectric materials and variations in cavity length and height inside the gate–oxide interface. Further, this device also showed significant variation for changes in different introduced charged particles or region materials, as simulated through a 2D visual Technology Computer-Aided Design (TCAD) device simulator.

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