scholarly journals Integrated photonic metasystem for image classifications at telecommunication wavelength

2021 ◽  
Author(s):  
Zi Wang ◽  
Lorry Chang ◽  
Feifan Wang ◽  
Tiantian Li ◽  
Tingyi Gu
Keyword(s):  
Integrated Circuits ◽  
Autonomous Vehicles ◽  
Complementary Metal Oxide Semiconductor ◽  
Phase Shifters ◽  
Oxide Semiconductor ◽  
Subwavelength Structures ◽  
Neuron Networks ◽  
Learning Tasks ◽  
Silicon Photonic ◽  
Telecommunication Wavelength

Abstract Miniaturized image classifiers are potential for revolutionizing their applications in optical communication, autonomous vehicles, and healthcare. With deep diffractive neuron networks trained subwavelength structures, we demonstrate image recognitions by a passive silicon photonic metasystem. The metasystem implements high-throughput vector-by-matrix multiplications, enabled by 103 passive subwavelength phase shifters as weight elements in 1 mm2 footprint. The large weight matrix size incorporates the fabrication variation related uncertainties, and thus the pre-trained metasystem can perform machine learning tasks without post-tuning. A 15-pixel spatial pattern classifier reaches near 90% accuracy with femtosecond inputs. The metasystem’s superior parallelism (1015 bit/s) dramatically expand data processing capability of photonic integrated circuits, towards next generation low latency and low power photonic accelerators compatible with complementary metal-oxide-semiconductor manufacturing.

scholarly journals High-speed programmable photonic circuits in a cryogenically compatible, visible–near-infrared 200 mm CMOS architecture

2021 ◽  
Author(s):  
Mark Dong ◽  
Genevieve Clark ◽  
Andrew J. Leenheer ◽  
Matthew Zimmermann ◽  
Daniel Dominguez ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Power Consumption ◽  
High Speed ◽  
Large Scale ◽  
Near Infrared ◽  
Response Times ◽  
Photonic Integrated Circuits ◽  
Complementary Metal Oxide Semiconductor ◽  
Phase Shifters ◽  
Oxide Semiconductor

AbstractRecent advances in photonic integrated circuits have enabled a new generation of programmable Mach–Zehnder meshes (MZMs) realized by using cascaded Mach–Zehnder interferometers capable of universal linear-optical transformations on N input/output optical modes. MZMs serve critical functions in photonic quantum information processing, quantum-enhanced sensor networks, machine learning and other applications. However, MZM implementations reported to date rely on thermo-optic phase shifters, which limit applications due to slow response times and high power consumption. Here we introduce a large-scale MZM platform made in a 200 mm complementary metal–oxide–semiconductor foundry, which uses aluminium nitride piezo-optomechanical actuators coupled to silicon nitride waveguides, enabling low-loss propagation with phase modulation at greater than 100 MHz in the visible–near-infrared wavelengths. Moreover, the vanishingly low hold-power consumption of the piezo-actuators enables these photonic integrated circuits to operate at cryogenic temperatures, paving the way for a fully integrated device architecture for a range of quantum applications.

Analysis and Simulation of a Low-Leakage Analog Single Gate and FinFET Circuits

2014 ◽  
Vol 13 (02) ◽  
pp. 1450012 ◽  
Author(s):  
Manorama Chauhan ◽  
Ravindra Singh Kushwah ◽  
Pavan Shrivastava ◽  
Shyam Akashe
Keyword(s):  
Integrated Circuits ◽  
Metal Oxide ◽  
Low Power ◽  
High Performance ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Short Channel ◽  
State Dependency ◽  
Low Leakage

In the world of Integrated Circuits, complementary metal–oxide–semiconductor (CMOS) has lost its ability during scaling beyond 50 nm. Scaling causes severe short channel effects (SCEs) which are difficult to suppress. FinFET devices undertake to replace usual Metal Oxide Semiconductor Field Effect Transistor (MOSFETs) because of their better ability in controlling leakage and diminishing SCEs while delivering a strong drive current. In this paper, we present a relative examination of FinFET with the double gate MOSFET (DGMOSFET) and conventional bulk Si single gate MOSFET (SGMOSFET) by using Cadence Virtuoso simulation tool. Physics-based numerical two-dimensional simulation results for FinFET device, circuit power is presented, and classifying that FinFET technology is an ideal applicant for low power applications. Exclusive FinFET device features resulting from gate–gate coupling are conversed and efficiently exploited for optimal low leakage device design. Design trade-off for FinFET power and performance are suggested for low power and high performance applications. Whole power consumptions of static and dynamic circuits and latches for FinFET device, believing state dependency, show that leakage currents for FinFET circuits are reduced by a factor of over ~ 10X, compared to DGMOSFET and ~ 20X compared with SGMOSFET.

scholarly journals 100 Gb/s Silicon Photonic WDM Transmitter with Misalignment-Tolerant Surface-Normal Optical Interfaces

Micromachines ◽  
2019 ◽  
Vol 10 (5) ◽  
pp. 336 ◽  
Author(s):  
Beiju Huang ◽  
Zanyun Zhang ◽  
Zan Zhang ◽  
Chuantong Cheng ◽  
Huang Zhang ◽  
...  
Keyword(s):  
Wavelength Division Multiplex ◽  
Complementary Metal Oxide Semiconductor ◽  
Silicon On Insulator ◽  
Oxide Semiconductor ◽  
Optical Modulator ◽  
Grating Coupler ◽  
Coupling Loss ◽  
Wavelength Division ◽  
Silicon Photonic ◽  
Fiber Misalignment

A 4 × 25 Gb/s ultrawide misalignment tolerance wavelength-division-multiplex (WDM) transmitter based on novel bidirectional vertical grating coupler has been demonstrated on complementary metal-oxide-semiconductor (CMOS)-compatible silicon-on-insulator (SOI) platform. Simulations indicate the bidirectional grating coupler (BGC) is widely misalignment tolerant, with an excess coupling loss of only 0.55 dB within ±3 μm fiber misalignment range. Measurement shows the excess coupling loss of the BGC is only 0.7 dB within a ±2 μm fiber misalignment range. The bidirectional grating structure not only functions as an optical coupler, but also acts as a beam splitter. By using the bidirectional grating coupler, the silicon optical modulator shows low insertion loss and large misalignment tolerance. The eye diagrams of the modulator at 25 Gb/s don’t show any obvious deterioration within the waveguide-direction fiber misalignment ranger of ±2 μm, and still open clearly when the misalignment offset is as large as ±4 μm.

Experimental Basis and Design of a New Cochlear Prosthesis System

1987 ◽  
Vol 96 (1_suppl) ◽  
pp. 76-79
Author(s):  
J. Génin ◽  
R. Charachon
Keyword(s):  
Theoretical Model ◽  
Integrated Circuits ◽  
Cochlear Implant ◽  
Dynamic Range ◽  
Complementary Metal Oxide Semiconductor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Technology ◽  
Experimental Basis ◽  
Cochlear Prosthesis

In a multichannel cochlear prosthesis, electrical interactions between electrodes impose severe limitations on dynamic range and selectivity. We present a theoretical model to cope with these limitations. Building a successful cochlear implant requires full custom-integrated circuits. We present the design of such a device, implemented in complementary metal oxide semiconductor technology. The area of the chip is 9 mm2 and it can stimulate 15 cochlear electrodes with current impulses.

scholarly journals Implementation of Analog Perceptron as an Essential Element of Configurable Neural Networks

Sensors ◽  
2020 ◽  
Vol 20 (15) ◽  
pp. 4222
Author(s):  
Chao Geng ◽  
Qingji Sun ◽  
Shigetoshi Nakatake
Keyword(s):  
Essential Element ◽  
Complementary Metal Oxide Semiconductor ◽  
Phase Shifters ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Digital To Analog Converter ◽  
Simulated Performance ◽  
Correct Function ◽  
Chip Testing ◽  
Hidden Neurons

Perceptron is an essential element in neural network (NN)-based machine learning, however, the effectiveness of various implementations by circuits is rarely demonstrated from chip testing. This paper presents the measured silicon results for the analog perceptron circuits fabricated in a 0.6 μm/±2.5 V complementary metal oxide semiconductor (CMOS) process, which are comprised of digital-to-analog converter (DAC)-based multipliers and phase shifters. The results from the measurement convinces us that our implementation attains the correct function and good performance. Furthermore, we propose the multi-layer perceptron (MLP) by utilizing analog perceptron where the structure and neurons as well as weights can be flexibly configured. The example given is to design a 2-3-4 MLP circuit with rectified linear unit (ReLU) activation, which consists of 2 input neurons, 3 hidden neurons, and 4 output neurons. Its experimental case shows that the simulated performance achieves a power dissipation of 200 mW, a range of working frequency from 0 to 1 MHz, and an error ratio within 12.7%. Finally, to demonstrate the feasibility and effectiveness of our analog perceptron for configuring a MLP, seven more analog-based MLPs designed with the same approach are used to analyze the simulation results with respect to various specifications, in which two cases are used to compare to their digital counterparts with the same structures.

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