scholarly journals NALISA SWITCHING SNUBBER AKTIF UNTUK BLOCK KONVERTER DC / DC

2019 ◽  
Vol 2 (3) ◽  
pp. 40
Author(s):  
R. Ahmad Cholilurrahman ◽  
Dodie Indryanto

Problems using the snubber circuit at switcing electronic in buck converter circuit is to reduced of power losses caused by there is no other walked other dissimilar for the load current of burden of moment of switching of electronic of turn off, so that collector voltage will appear in the collector terminal. As evaluation, power losses at electronic switching of moment of turn off without snubber very big, this matter is happened by because its current descend and its voltage go up. There for need in tide of snubber circuit at switching electronic, because subber circuit give the other dissimilar walked for the current of burden of moment of switching electronic turn off. Result of the end show the power losses at electronic switching with snubber circuit of become minimize, if compare to by a power losses at electronic switching without snubber circuit at the time turn off.

Energies ◽  
2020 ◽  
Vol 13 (4) ◽  
pp. 856
Author(s):  
Jing-Yuan Lin ◽  
Yi-Chieh Hsu ◽  
Yo-Da Lin

In this paper, a triangular spread-spectrum mechanism is proposed to suppress the electromagnetic interference (EMI) of a DC-DC buck converter. The proposed triangular spread-spectrum mechanism, which is implemented in the chip, can avoid modifying the printed circuit board of switching regulators. In addition, a lower ripple of output voltage of switching regulators and a better system stability can be realized by the inductive DC resistance (DCR) current sensing circuit. The chip is fabricated by using TSMC 0.18-μm 1P6M CMOS technology. The chip area including PADs is 1.2 × 1.15 mm2. The input voltage range is 2.7~3.3 V and the output voltage is 1.8 V. The maximum load current is 700 mA. The off-chip inductor and capacitor are 3.3 μH and 10 μF, respectively. The experimental results demonstrate that the maximum spur of the proposed DC-DC buck converter with the triangular spread-spectrum mechanism improves to 14dBm. Moreover, the transient recovery time of step-up and step-down loads are both 5 μs. The measured maximum efficiency is 94% when the load current is 200 mA.


Sensors ◽  
2019 ◽  
Vol 19 (10) ◽  
pp. 2420 ◽  
Author(s):  
Sung Jin Kim ◽  
Dong Gyu Kim ◽  
Seong Jin Oh ◽  
Dong Soo Lee ◽  
Young Gun Pu ◽  
...  

This paper presents a low power Gaussian Frequency-Shift Keying (GFSK) transceiver (TRX) with high efficiency power management unit and integrated Single-Pole Double-Throw switch for Bluetooth low energy application. Receiver (RX) is implemented with the RF front-end with an inductor-less low-noise transconductance amplifier and 25% duty-cycle current-driven passive mixers, and low-IF baseband analog with a complex Band Pass Filter(BPF). A transmitter (TX) employs an analog phase-locked loop (PLL) with one-point GFSK modulation and class-D digital Power Amplifier (PA) to reduce current consumption. In the analog PLL, low power Voltage Controlled Oscillator (VCO) is designed and the automatic bandwidth calibration is proposed to optimize bandwidth, settling time, and phase noise by adjusting the charge pump current, VCO gain, and resistor and capacitor values of the loop filter. The Analog Digital Converter (ADC) adopts straightforward architecture to reduce current consumption. The DC-DC buck converter operates by automatically selecting an optimum mode among triple modes, Pulse Width Modulation (PWM), Pulse Frequency Modulation (PFM), and retention, depending on load current. The TRX is implemented using 1P6M 55-nm Complementary Metal–Oxide–Semiconductor (CMOS) technology and the die area is 1.79 mm2. TRX consumes 5 mW on RX and 6 mW on the TX when PA is 0-dBm. Measured sensitivity of RX is −95 dBm at 2.44 GHz. Efficiency of the DC-DC buck converter is over 89% when the load current is higher than 2.5 mA in the PWM mode. Quiescent current consumption is 400 nA from a supply voltage of 3 V in the retention mode.


Author(s):  
Syukri Bin Idham Halis ◽  
M.K.A. Ahamed Khan ◽  
Siti Nor Baizura bt Zawawi ◽  
Rohaizah Bt Mohd Ghazali ◽  
I. Elamvazuthi

2012 ◽  
Vol 463-464 ◽  
pp. 1350-1354
Author(s):  
Zhen Yan Wang ◽  
Zhi Mei Chen ◽  
Jing Gang Zhang

In buck converter, the reverse recovery failure may cause electrical spikes and deteriorate the circuit performance. In this paper, the snubber circuits for FRD in Buck converter are presented and the simulation and experimental study are investigated. RC snubber, saturated inductance snubber and RCD snubber are developed and simulated by PSpice to reduce the voltage spikes of FRD. The comparisons of the voltage spike show the advantages of the snubber circuit for the reverse recovery failure of FRD. In a Buck converter experimental system with RCD snubber circuits, the measured voltage show that the voltage spike of FRD can be suppressed effectively. Simulation and experimental results prove that the snubber circuits presented is easy to implement and can improve the buck converter performance


Author(s):  
Kjersti Bruserud

In lack of simultaneous metocean data for wind, waves and currents, Norwegian design regulations recommend a combination of metocean parameters for estimation of extreme metocean loads on offshore structures assumed to be conservative. The possible conservatism in the design regulations and also the effect of currents in the estimation of extreme loads are considered. A simplified parametric load model for a jacket, based on waves and currents, is assumed. Both measured and hindcast wave data are combined with different measured current data into load time series and the extreme loads estimated. The extreme load according to the recommended approach is also estimated. This is done at four locations in the northern North Sea. When compared to the recommended approach, the other approaches yield a reduced estimated extreme metocean load. Current is found to have an effect on the total extreme load. The results are intended be illustrative and not suitable for use in design.


2019 ◽  
Vol 27 (2) ◽  
pp. 194-206
Author(s):  
Ismael Khaleel Murad

In this paper both synchronous and asynchronous buck-converter were designed to work in continuous conduction mode “CCM” and to deliver small load current. Then the two topologies were tested in terms of efficiency at small load current by use of  different values of switching frequencies (range from 150 KHz to 1MHz) and three separated values of duty-cycle (0.4, 0.6 and 0.8).   Obtained results turns out that efficiency of both synchronous and asynchronous buck-converter “switching step-down voltage regulator” responds in a negative manner to the increase in the switching frequency. However, this impact is being stronger in synchronous topology because of magnifying effect of losses related to switching frequency compared to those related to conduction when working at small load currents; this behavior makes obtained efficiency of both topologies in convergent levels when they operated to deliver small output current especially when working with higher switching frequencies. Larger duty-cycle can rise up the efficiency of both topologies.


Author(s):  
SUNG SIK PARK ◽  
JU SANG LEE ◽  
SANG DAE YU

This paper presents a new technique that adjusts the hysteresis window depending on the variations in load current caused by a voltage-mode circuit to reduce the voltage and current ripples. Moreover, a compact current-sensing circuit is used to provide an accurate sensing signal for achieving fast hysteresis window adjustment. In addition, a zero-current detection circuit is also proposed to eliminate the reverse current at light loads. As a result, this technique reduces the voltage ripple below 8.08 mVpp and the current ripple below 93.98 mApp for a load current of 500 mA. Circuit simulation is performed using 0.18 μm CMOS process parameters.


2021 ◽  
Author(s):  
Teo Hong Liang ◽  
Manickam Ramasamy ◽  
Mohamad Khan Afthan Ahmed Khan

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