A Novel Approach to Identifying and Validating Electrical Leakage in Printed Circuit Boards Through Magnetic Current Imaging

Author(s):  
Craig Hillman

Abstract Superconducting Quantium Interferance Device (SQUID) microscopy uses detection of magnetic fields to image current paths within electronic devices and has been successful in non-destructively identifying the location of low leakage currents, even when the failure site was between a power and ground plane. This article presents a case study in which the customer was experiencing ignition of a 20-layer printed circuit board after approximately 1000 to 4000 operating hours in an indoor-controlled environment. High currents on the board resulted in extensive damage, effectively preventing initial identification of the failure site, failure mechanism, or root-cause. Based on a review of potential failure mechanisms, measurement of relevant parameters, and the results of SQUID microscopy, the process of electrochemical migration around or through the particles was determined to be the most likely root-cause of electrical shorting between power and ground.

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 539
Author(s):  
Ryan P. Tortorich ◽  
William Morell ◽  
Elizabeth Reiner ◽  
William Bouillon ◽  
Jin-Woo Choi

Because modern electronic systems are likely to be exposed to high intensity radiated fields (HIRF) environments, there is growing interest in understanding how electronic systems are affected by such environments. Backdoor coupling in particular is an area of concern for all electronics, but there is limited understanding about the mechanisms behind backdoor coupling. In this work, we present a study on printed circuit board (PCB) backdoor coupling and the effects of via fencing. Existing work focuses on ideal stackups and indicates that edge radiation is significantly reduced by via fencing. In this study, both full wave electromagnetic modeling and experimental verification are used to investigate both ideal and practical PCB stackups. In the ideal scenario, we find that via fencing substantially reduces coupling, which is consistent with prior work on emissions. In the practical scenario, we incorporate component footprints and traces which naturally introduce openings in the top ground plane. Both simulation and experimental data indicate that via fencing in the practical scenario does not substantially mitigate coupling, suggesting that PCB edge coupling is not the dominant coupling mechanism, even at varying angles of incidence and polarization.


Author(s):  
Daren T. Slee

Abstract This paper is a review of propagating faults in printed circuit boards (PCBs) from the perspective of using the resulting burn and melted copper patterns to identify likely locations of fault initiation. Visual examination and x-ray imaging are the main techniques for examining PCB propagating faults. Once the likely fault initiation location has been identified, fault tree analysis can be used to determine the root cause for fault initiation. The paper discusses the mechanisms by which PCB propagating faults occur. The method of determining the likely area of initiation of the fault using visual examination of the PCB burn pattern, x-ray imaging, and the layout artwork for the PCB is discussed. The paper then goes on to discuss possible root-causes for the initiation of PCB propagating faults and some of their considerations.


Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.


Author(s):  
Jun-Xian Fu ◽  
Shukri Souri ◽  
James S. Harris

Abstract Temperature and humidity dependent reliability analysis was performed based on a case study involving an indicator printed-circuit board with surface-mounted multiple-die red, green and blue light-emitting diode chips. Reported intermittent failures were investigated and the root cause was attributed to a non-optimized reflow process that resulted in micro-cracks and delaminations within the molding resin of the chips.


Author(s):  
P. Singh ◽  
G.T. Galyon ◽  
J. Obrzut ◽  
W.A. Alpaugh

Abstract A time delayed dielectric breakdown in printed circuit boards, operating at temperatures below the epoxy resin insulation thermo-electrical limits, is reported. The safe temperature-voltage operating regime was estimated and related to the glass-rubber transition (To) of printed circuit board dielectric. The TG was measured using DSC and compared with that determined from electrical conductivity of the laminate in the glassy and rubbery state. A failure model was developed and fitted to the experimental data matching a localized thermal degradation of the dielectric and time dependency. The model is based on localized heating of an insulation resistance defect that under certain voltage bias can exceed the TG, thus, initiating thermal degradation of the resin. The model agrees well with the experimental data and indicates that the failure rate and truncation time beyond which the probability of failure becomes insignificant, decreases with increasing glass-rubber transition temperature.


2021 ◽  
Vol 11 (6) ◽  
pp. 2808
Author(s):  
Leandro H. de S. Silva ◽  
Agostinho A. F. Júnior ◽  
George O. A. Azevedo ◽  
Sergio C. Oliveira ◽  
Bruno J. T. Fernandes

The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC’s weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB’s ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs’ ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.


Circuit World ◽  
2016 ◽  
Vol 42 (1) ◽  
pp. 32-36 ◽  
Author(s):  
Michal Baszynski ◽  
Edward Ramotowski ◽  
Dariusz Ostaszewski ◽  
Tomasz Klej ◽  
Mariusz Wojcik ◽  
...  

Purpose – The purpose of this paper is to evaluate thermal properties of printed circuit board (PCB) made with use of new materials and technologies. Design/methodology/approach – Four PCBs with the same layout but made with use of different materials and technologies have been investigated using thermal camera to compare their thermal properties. Findings – The results show how important the thermal properties of PCBs are for providing effective heat dissipation, and how a simple alteration to the design can help to improve the thermal performance of electronic device. Proper layout, new materials and technologies of PCB manufacturing can significantly reduce the temperature of electronic components resulting in higher reliability of electronic and power electronic devices. Originality/value – This paper shows the advantages of new technologies and materials in PCB thermal management.


2021 ◽  
Author(s):  
A. E. Averyanikhin ◽  
A. I. Vlasov ◽  
E. V. Evdokimova

The main problem of known deep convolutional neural networks (CNN) is that they require a fixed-size input image. This requirement is “artificial” and can reduce recognition accuracy for images or its parts of arbitrary size/scale. The paper proposes a strategy of combining “hierarchical pyramidal subselection” to eliminate the above restriction. The structure of the neural network using the proposed combining strategy allows the generation of prediction regardless of the size/scale of the original image, and also improves the accuracy of recognition. Features of application of CNN for identification and recognition of defects of conducting pattern of printed circuit board blanks have been considered. Features of defects of conductive pattern of printed circuit board blanks have been briefly discussed. The invention proposes the use of artificial CNN, which have advantages in speed and accuracy in solving problems of object recognition on images relative to existing methods. The focus is on the architecture of CNN using hierarchical pyramidal subselection. Capabilities of application of CNN for recognition of defects of conducting pattern of printed circuit board blanks have been shown. Proposed method of hierarchical pyramidal subselection in deep convolutional networks has been implemented in software complex, which allows processing digital data of photographs of conducting pattern of printed circuit boards, in particular during their flaw detection, and can be used for localization of existing defects of conducting pattern. The conclusion draws the possibilities of using methods and means of image processing in flaw detection of radio-electronic equipment and instruments


2018 ◽  
Vol 2018 ◽  
pp. 1-10 ◽  
Author(s):  
P. Sivakumar ◽  
D. Prabhakaran ◽  
M. Thirumarimurugan

The aim of the study was to recover copper and lead metal from waste printed circuit boards (PCBs). The electrowinning method is found to be an effective recycling process to recover copper and lead metal from printed circuit board wastes. In order to simplify the process with affordable equipment, a simple ammonical leaching operation method was adopted. The selected PCBs were incinerated into fine ash powder at 500°C for 1 hour in the pyrolysis reactor. Then, the fine ash powder was subjected to acid-leaching process to recover the metals with varying conditions like acid-base concentration, electrode combination, and leaching time. The relative electrolysis solution of 0.1 M lead nitrate for lead and 0.1 M copper sulphate for copper was used to extract metals from PCBs at room temperature. The amount of lead and copper extracted from the process was determined by an atomic absorption spectrophotometer, and results found were 73.29% and 82.17%, respectively. Further, the optimum conditions for the recovery of metals were determined by using RSM software. The results showed that the percentage of lead and copper recovery were 78.25% and 89.1% should be 4 hrs 10 A/dm2.


2018 ◽  
Vol 10 (2) ◽  
pp. 179-186 ◽  
Author(s):  
Alexander Fricke ◽  
Mounir Achir ◽  
Philippe Le Bars ◽  
Thomas Kürner

AbstractBased on vector network analyzer Measurements, a model for the specular reflection behavior of printed circuit boards in the Terahertz range has been derived. It has been calibrated to suit the behavior of the measurements using a simulated annealing algorithm. The model has been tailored for integration to ray-tracing-based propagation modeling.


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