Characterization of Gate Oxide Pinhole Defect in NMOS FinFET Devices
Abstract This paper highlights the application of nanoprobing technique and electron tomography analysis to characterize the tiny gate oxide pinhole defect in NMOS FinFET devices. Nanoprobing technique was utilized to achieve a better understanding on the failure mechanism by characterizing the device electrical behaviors, and electron tomography, capable of mitigating the common projection issue encountered by general TEM analysis, was applied for physical analysis. It has been demonstrated through two cases, one logic fail and the other memory fail, that these two techniques together can effectively identify the root cause of pinhole defect. This type of pinhole defect, characterized by a tiny spot of oxide discontinuity and without excessive materials inter-diffusion, has been extremely challenging in FA analysis. This paper will provide the analysis details leading to the successful characterization of such type of oxide pinhole defect.