Analysis of Circuit Simulation Considering Total Ionizing Dose Effects on FinFET and Nanowire FET

In this study, we analyzed the total ionizing dose (TID) effect characteristics of p-type FinFET and Nanowire FET (NW-FET) according to the structural aspect through comparison of the two devices. Similar to n-type devices, p-type NW-FETs are less affected than FinFETs by the TID effect. For the inverter TID circuit simulation, both n- and p-types of FinFET and NW-FET were analyzed regarding the TID effect. The inverter operation considering the TID effect was verified using the Berkeley short-channel insulated-gate FET model (BSIM) common multi-gate (CMG) parameters. In addition, an inverter circuit composed of the NW-FET exhibited a smaller change by the TID than that of an inverter circuit composed of the FinFET. Therefore, the gate controllability of the gate-all-around (GAA) device had an excellent tolerance to not only short-channel effects (SCE) but also TID effects.

Download Full-text

Scallop-shaped p-type FinFETs with improved short-channel effects immunity and driving current

Materials Science in Semiconductor Processing ◽

10.1016/j.mssp.2021.106337 ◽

2022 ◽

Vol 140 ◽

pp. 106337

Author(s):

Zhaohao Zhang ◽

Weizhuo Gan ◽

Junjie Li ◽

Zhenzhen Kong ◽

Yanchu Han ◽

...

Keyword(s):

Short Channel Effects ◽

Short Channel ◽

Driving Current ◽

Channel Effects ◽

P Type

Download Full-text

Analysis of Omega-Gate Nanowire SOI MOSFET Under Analog Point of View

Journal of Integrated Circuits and Systems ◽

10.29292/jics.v15i1.113 ◽

2020 ◽

Vol 15 (1) ◽

pp. 1-6

Author(s):

Welder Fernandes Perina ◽

João Antonio Martino ◽

Paula Ghedini Der Agopian

Keyword(s):

Point Of View ◽

Short Channel Effects ◽

Theoretical Limit ◽

Short Channel ◽

Worst Case ◽

Channel Effects ◽

Electrostatic Coupling ◽

Channel Lengths ◽

P Type ◽

New Applications

This paper presents an evaluation of omega-gate nanowire n- and p-type SOI MOSFETs performance focusing on the main analog figures of merit. The different channel widths (WNW) and channel lengths (L) were also evaluated. These devices presented values of subthreshold slope near the theoretical limit at room temperature (60 mV/dec) and in the worst case a DIBL value smaller than 70 mV/V showing its immunity to short channel effects (SCEs) in the range studied. The narrowest device showed great electrostatic coupling, improving transconductance (gm), presenting an unit gain frequency over 200 GHz and intrinsic voltage gain over 80 dB. These values suggests that this device is capable of achieving good performance on new applications such as 5G communications and Internet-of-Things (IoT).

Download Full-text

Short-Channel Effects in 4H-SiC MOSFETs

Materials Science Forum ◽

10.4028/www.scientific.net/msf.483-485.821 ◽

2005 ◽

Vol 483-485 ◽

pp. 821-824

Author(s):

Masato Noborio ◽

Y. Kanzaki ◽

Jun Suda ◽

Tsunenobu Kimoto ◽

Hiroyuki Matsunami

Keyword(s):

Threshold Voltage ◽

Empirical Relationship ◽

Device Simulation ◽

Oxide Thickness ◽

Short Channel Effects ◽

Short Channel ◽

Channel Effects ◽

Channel Lengths ◽

P Type

Short-channel effects in SiC MOSFETs have been investigated. Planar MOSFETs with various channel lengths have been fabricated on p-type 4H-SiC (0001), (000-1) and (11-20) faces.^Short-channel effects such as punchthrough behavior, decrease of threshold voltage and deterioration of subthreshold characteristics are observed. Furthermore, the critical channel lengths below which short-channel effects occur are analyzed as a function of p-body doping and oxide thickness by using device simulation. The critical channel lengths in the fabricated SiC MOSFETs are in agreement with those obtained from the device simulation. The results are also in agreement with the empirical relationship for Si MOSFETs.

Download Full-text

Comparison of Various Factors Affected TID Tolerance in FinFET and Nanowire FET

Applied Sciences ◽

10.3390/app9153163 ◽

2019 ◽

Vol 9 (15) ◽

pp. 3163

Author(s):

Hyeonjae Won ◽

Ilsik Ham ◽

Youngseok Jeong ◽

Myounggon Kang

Keyword(s):

Threshold Voltage ◽

Radiation Effects ◽

Radiation Environment ◽

Short Channel Effects ◽

Total Ionizing Dose ◽

Short Channel ◽

Device Scaling ◽

Trap Parameter ◽

Channel Effects

Analysis of the radiation effects in a device is of great importance. The gate all around (GAA) structure that contributes to device scaling not only solves the short channel effects (SCE) problem but also makes the device more resistant in radiation environments. In this article, the total ionizing dose (TID) simulation of nanowire FET (NW) and FinFET was performed. Both these devices were compared and analyzed in terms of the shift of threshold voltage (VT). The channel insulator was composed of two materials, SiO2 and HfO2. To improve the accuracy of the simulation, the interfacial trap parameter of SiO2 and HfO2 was applied. Based on the simulation result, the NW with a larger oxide area and larger gate controllability showed less VT shift than that of the FinFET. It was therefore proved that NW had better TID resistance characteristics in a radiation environment. The gate controllability was found to affect the TID effect more than the oxide area. In addition, we analyzed the manner in which the TID effect changed depending on the VDD and channel doping.

Download Full-text