scholarly journals Reconfiguration Strategy for Fault Tolerance in a Cascaded Multilevel Inverter Using a Z-Source Converter

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 574
Author(s):  
Jesus Aguayo-Alquicira ◽  
Iván Vásquez-Libreros ◽  
Susana Estefany De Léon-Aldaco ◽  
Mario Ponce-Silva ◽  
Ricardo Eliu Lozoya-Ponce ◽  
...  

The cascade multilevel inverters are widely used in industrial manufacturing processes for DC-AC conversion. Therefore, the reliability and efficiency improvement, optimized control, and fault-tolerant strategies are areas of interest for researchers. The fault tolerance strategies applied to cascade multilevel inverters are classified as material redundancy and analytical redundancy. This paper presents the use of the Z-source converter as a fault reconfiguration method applied to a cascade multilevel inverter. On the one hand, the proposed approach has the characteristic of combining the use of material redundancy (modifying the output voltage by changing the Z-source operation), and on the other hand, it has the use of analytical redundancy (modifying the switching sequence of the multilevel inverter, changing from symmetrical to asymmetrical operation mode). This approach has been validated by experimental results of the system under fault-free conditions and employing the Z-source converter as the main fault reconfiguration element. The proposed fault reconfiguration strategy allows the cascaded multilevel inverter to continue to operate even in the presence of a fault by having continuous operation.

2013 ◽  
Vol 344 ◽  
pp. 159-163
Author(s):  
Zhen Jun Lin ◽  
Sheng Hua Huang

Cascaded multilevel inverters could realize high-voltage output based on a series connection of power cells which use standard low-voltage component configurations. This characteristic could achieve high-quality output voltage waveforms and input current waveforms. These merits are made for motor control, especially in the field of speed-sensorless vector control of induction motor based on the theory of MRAS. This paper constructs a simulation system with the help of MATLB/SIMULINK and a system combined cascaded H-bridge multilevel inverter with induction motor with the help of DSP and FPGA. The simulation and experiment results verified the superiority of cascaded multilevel inverter applied on the MRAS speed-sensorless vector control of induction motor.


2013 ◽  
Vol 768 ◽  
pp. 231-237
Author(s):  
R. Seyezhai ◽  
K. Radha Sree ◽  
K. Sivapathi ◽  
V. Vardhaman

Multilevel inverters have been gaining immense popularity in high power applications such as Electric vehicles, Flexible AC Transmission Systems etc. This paper focuses on an asymmetric cascaded multilevel inverter employing the variable frequency carrier phase shifted PWM technique. The major advantage of this strategy is that it aids in balancing the switch utilization. The proposed strategy was found to have lower THD and switching losses when compared to the conventional strategies. The simulation was performed using MATLAB/Simulink and the results were verified experimentally.


2021 ◽  
Vol 6 (1) ◽  
pp. 63-73
Author(s):  
Hossein Khoun-Jahan ◽  

Cascaded multilevel inverter (CMI) topology is prevalent in many applications. However, the CMI requires many switches and isolated dc sources, which is the main drawback of this type of inverter. As a result, the volume, cost and complexity of the CMI topology are increased and the efficiency is deteriorated. This paper thus proposes a switched-capacitor-based multilevel inverter topology with half-bridge cells and only one dc source. Compared to the conventional CMI, the proposed inverter uses almost half the number of switches, while maintaining a boosting capability. Additionally, the main drawback of switched-capacitor multilevel inverters is the capacitor inrush current. This problem is also averted in the proposed topology by using a charging inductor or quasi-resonant capacitor charging with a front-end boost converter. Simulation results and lab-scale experimental verifications are provided to validate the feasibility and viability of the proposed inverter topology.


Author(s):  
S. Usha ◽  
C. Subramani ◽  
A. Geetha

This paper deals with the design of cascaded 11 level H- bridge inverter. It includes a comparison between the 11 level H-bridge and T-bridge multilevel inverter. The cascaded inverter of higher level is a very effective and practical solution for reduction of total harmonic distortion (THD).These cascaded multilevel inverter can be used for higher voltage applications with more stability. As the level is increased the output waveform becomes more sinusoidal in nature. The inverter is designed using multicarrier sinusoidal pulse width modulation technique for generating triggering pulses for the semiconductor switches used in the device. Through this paper it will be proved that a cascaded multilevel H-bridge topology has higher efficiency than a T-bridge inverter, as whichever source input voltage is provided since input is equal to the output voltage. In T-bridge inverter, the output obtained is half of the applied input, so efficiency is just half as compared to H-bridge. The output waveform is distorted and has higher THD.  The simulation is performed using MATLAB /Simulink 2013 software.


2013 ◽  
Vol 313-314 ◽  
pp. 876-881
Author(s):  
M.R. Rashmi ◽  
B. Anu

Nonconventional energy sources are playing important role in meeting current power/energy demands. However these sources cannot provide High voltage/power. For power conditioning and voltage amplification solid state power converters are very much essential. One such approach to obtain high voltage was to use cascaded multilevel inverter but cascaded multilevel inverters require separate DC sources and they cannot be used for regenerative applications. To overcome these limitations, a novel configuration is using diode clamped multilevel inverter is proposed here. . The conditioned DC voltage from photovoltaic cells or fuel cells or batteries is boosted and inverted by means of multistage Multilevel Inverters (MLI). Three different configurations are presented in this paper. From the simulation results of all three configurations, the topology which is found to be better is implemented in the real time. A proto type is developed to boost 40 V input DC to 100 V AC and the experimental results for the same are presented.


Author(s):  
Lipika Nanda ◽  
A Dasgupta ◽  
U.K. Rout

<p>As multilevel inverters are gaining increasing importance .New topologies are being proposed in order to achieve large number of levels in output voltage. A simplified MLI topology has been presented with both symmetrical and asymmetrical configurations. This paper represents a comprehensive analysis of above mentioned topology with FFT analysis,switching and conduction losses of the inverter.Hence efficiency at different carrier frequencies has been calculated successfully.Results are verified with simulation studies.Multilevel inverters are currently considered as a better industrial solution for high dynamic performance and power-quality demanding applications, covering a wide power range.</p>


2020 ◽  
Vol 8 (5) ◽  
pp. 4952-4961

Majority of loads in use today are power electronics based non-linear devices. Despite being compact and providing low energy consumption these loads generate inherent harmonics. Harmonics have several adverse effects such as interference with the communication lines, incorrect meter readings, increased losses, increased heating of electrical and sensitive electronic equipment. Sophisticated power electronic converter based filters named as Shunt Active Power Filters (SAPF) are widely being employed that provide superior harmonic filtering capabilities. Basic objective of SAPF is to generate or absorb currents that compensate harmonic currents produced by non- linear loads. These currents should be opposite in phase but have equivalent magnitude as that of harmonic currents. As compared to Diode-Clamped and Flying capacitor multilevel inverters, Cascaded multilevel configuration is employed for many applications due to ease of control and simple structure. In this research paper, power quality in a three-phase threewire system is improved by reducing source side current harmonics produced by a non-linear load. Initially a three-level Cascaded multilevel inverter based SAPF is developed and its performance is analyzed by using advanced Adaptive Neuro Fuzzy Inference System (ANFIS) controller. DC link capacitor voltage and percentage Total Harmonic Distortion (%THD) in source currents is measured at PCC for balanced loading conditions and results are compared. In this paper, it is also proposed to incorporate multilevel inverter topology concepts by employing Five-Level and Seven-Level Cascaded Multilevel Inverters as VSI circuit for SAPF. Performance of these multilevel Shunt Active power filters is analyzed by ANFIS controller. Instantaneous Active-Reactive power theory is implemented to compute reference compensating currents for all Shunt Active power filter models. Phase Disposition type Pulse Width modulation is chosen for generating gate pulses for VSI circuits of all Cascaded multilevel inverter configurations. Three-level, Five-level and Seven-level Shunt active power filter models are developed and simulated using MATLAB/ Simulink and results are presented.


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