scholarly journals A 6 GHz Integrated High-Efficiency Class-F−1 Power Amplifier in 65 nm CMOS Achieving 47.8% Peak PAE

Electronics ◽  
2021 ◽  
Vol 10 (20) ◽  
pp. 2450
Author(s):  
Syed Muhammad Ammar Ali ◽  
S. M. Rezaul Hasan
Keyword(s):  
Power Amplifier ◽  
Peak Power ◽  
High Efficiency ◽  
Impedance Matching ◽  
Center Frequency ◽  
Dual Purpose ◽  
Power Added Efficiency ◽  
Harmonic Control ◽  
Saturated Output Power ◽  
Class F

This paper reports a “single-transistor” Class-F−1 power amplifier (PA) in 65 nm CMOS, which operates at the microwave center frequency of 6 GHz. The PA is loaded with a Class-F−1 harmonic control network, employing a new “parasitic-aware” topology deduced using a novel iterative algorithm. A dual-purpose output matching network is designed, which not only serves the purpose of output impedance matching, but also reinforces the harmonic control of the Class-F−1 harmonic network. This proposed PA yields a peak power-added efficiency (PAE) of 47.8%, which is one of the highest when compared to previously reported integrated microwave/millimeter-wave PAs in CMOS and SiGe technologies. The amplifier shows a saturated output power of 14.4 dBm along with an overall gain of 13.8 dB.

scholarly journals Design of 0.8–2.7 GHz High Power Class-F Harmonic-Tuned Power Amplifier with Parasitic Compensation Circuit

2017 ◽  
Vol 2017 ◽  
pp. 1-8 ◽  
Author(s):  
Zhiqun Cheng ◽  
Xuefei Xuan ◽  
Huajie Ke ◽  
Guohua Liu ◽  
Zhihua Dong ◽  
...  
Keyword(s):  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Impedance Matching ◽  
Harmonic Suppression ◽  
Compensation Circuit ◽  
Third Harmonic ◽  
The Third ◽  
Saturated Output Power ◽  
Class F

The design, implementation, and measurements of a high efficiency and high power wideband GaN HEMT power amplifier are presented. Package parasitic effect is reduced significantly by a novel compensation circuit design to improve the accuracy of impedance matching. An improved structure is proposed based on the traditional Class-F structure with all even harmonics and the third harmonic effectively controlled, respectively. Also the stepped-impedance matching method is applied to the third harmonic control network, which has a positive effect on the expansion bandwidth. CGH40025F power transistor is utilized to build the power amplifier working at 0.8 to 2.7 GHz, with the measured saturated output power 20–50 W, drain efficiency 52%–76%, and gain level above 10 dB. The second and the third harmonic suppression levels are maintained at −16 to −36 dBc and −16 to −33 dBc, respectively. The simulation and the measurement results of the proposed power amplifier show good consistency.

High-efficiency inverse class-F power amplifier using 3/4 spiral symmetric defected ground structure

2011 ◽  
Vol 3 (6) ◽  
pp. 621-625
Author(s):  
Shilei Jin ◽  
Jianyi Zhou ◽  
Lei Zhang
Keyword(s):  
Power Amplifier ◽  
High Performance ◽  
High Efficiency ◽  
Control Circuit ◽  
Defected Ground Structure ◽  
Ground Structure ◽  
Power Added Efficiency ◽  
Harmonic Control ◽  
Resonance Frequencies ◽  
Class F

In this article, the development of a high-efficiency power amplifier (PA) with the inverse class-F configuration and a novel 3/4 spiral defected ground structure (DGS) is presented. The proposed DGS structure has improved rejection characteristic and its resonance frequencies are more convenient to adjust than conventional symmetric and asymmetric spiral structure. The electromagnetic-simulated result shows that the proposed circuit has improved harmonic control performance with simplified structure and less return loss than the conventional microstrip harmonic control circuit. The 3/4 spiral harmonics control circuit (HCC) can be modeled by three parallel RLC resonators. Using the proposed structure a high-performance harmonic control circuit is designed for implementing an inverse class-F PA. For comparison, two inverse class-F PAs operating at 2.4 GHz have been implemented by the microstrip HCC and the proposed HCC, respectively. According to the experiment results, the size of the proposed inverse class-F PA is reduced by 20%, the power-added efficiency and the gain are increased by 4.8% and 1.5 dB, respectively.

A 4.2-to-5.4 GHz stacked GaAs HBT power amplifier for C-band applications

Circuit World ◽  
2020 ◽  
Vol 46 (4) ◽  
pp. 243-248
Author(s):  
Min Liu ◽  
Panpan Xu ◽  
Jincan Zhang ◽  
Bo Liu ◽  
Liwen Zhang
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
High Power ◽  
High Efficiency ◽  
Common Source ◽  
Power Performance ◽  
Matching Network ◽  
Content Type ◽  
Power Added Efficiency ◽  
Saturated Output Power

Purpose Power amplifiers (PAs) play an important role in wireless communications because they dominate system performance. High-linearity broadband PAs are of great value for potential use in multi-band system implementation. The purpose of this paper is to present a cascode power amplifier architecture to achieve high power and high efficiency requirements for 4.2∼5.4 GHz applications. Design/methodology/approach A common emitter (CE) configuration with a stacked common base configuration of heterojunction bipolar transistor (HBT) is used to achieve high power. T-type matching network is used as input matching network. To increase the bandwidth, the output matching networks are implemented using the two L-networks. Findings By using the proposed method, the stacked PA demonstrates a maximum saturated output power of 26.2 dBm, a compact chip size of 1.17 × 0.59 mm2 and a maximum power-added efficiency of 46.3 per cent. The PA shows a wideband small signal gain with less than 3 dB variation over working frequency. The saturated output power of the proposed PA is higher than 25 dBm between 4.2 and 5.4 GHz. Originality/value The technology adopted for the design of the 4.2-to-5.4 GHz stacked PA is the 2-µm gallium arsenide HBT process. Based on the proposed method, a better power performance of 3 dB improvement can be achieved as compared with the conventional CE or common-source amplifier because of high output stacking impedance.

Design of a Miniaturized Class F Power Amplifier Using Capacitor Loaded Transmission Lines

Frequenz ◽  
2020 ◽  
Vol 74 (3-4) ◽  
pp. 145-152
Author(s):  
Ali Pirasteh ◽  
Saeed Roshani ◽  
Sobhan Roshani
Keyword(s):  
Power Amplifier ◽  
Mobile Communications ◽  
Transmission Lines ◽  
Low Voltage ◽  
Good Choice ◽  
Band Frequency ◽  
Power Added Efficiency ◽  
Harmonic Control ◽  
Measurement Results ◽  
Class F

AbstractIn this paper, a new method to decrease the dimensions of the microstrip structures and reducing the overall size of the class F amplifiers is presented. First, by using the PHEMT transistor with a conventional harmonic control circuit (HCC), a low-voltage class F amplifier in the L band frequency at the operating frequency of 1.75 GHz is introduced, which named primitive class F power amplifier. Then, this amplifier is optimized by using capacitor loaded transmission lines (CLTLs). The measurement results of the amplifier show that by using the CLTL structure, the overall size has been reduced 85% (0.23 λg × 0.17 λg). The maximum power-added efficiency (PAE) of the power amplifier is about 77.5 % and the power gain which has been reached to 18.33 dB. The desirable features of this power amplifier, along with its very small size, make this power amplifier a good choice to use for the global system for mobile communications.

scholarly journals Efficient technique for ultra broadband, linear power amplifier design

2012 ◽  
Vol 4 (6) ◽  
pp. 559-567 ◽  
Author(s):  
Ahmed Sayed ◽  
Sebastian Preis ◽  
Georg Boeck
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Impedance Matching ◽  
Network Synthesis ◽  
Circuit Performance ◽  
Power Added Efficiency ◽  
Starting Point ◽  
Saturated Output Power ◽  
Linear Power Amplifier ◽  
Amplifier Design

In this paper, a 10 W ultra-broadband GaN power amplifier (PA) is designed, fabricated, and tested. The suggested design technique provides a more accurate starting point for matching network synthesis and better prediction of achievable circuit performance. A negative-image model was used to fit the extracted optimum impedances based on source-/load-pull technique and multi-section impedance matching networks were designed. The implemented amplifier presents an excellent broadband performance, resulting in a gain of 8.5 ± 0.5 dB, saturated output power of ≥10 W, and power added efficiency (PAE) of ≥23% over the whole bandwidth. The linearity performance has also been characterized. An output third-order intercept point (OIP3) of ≥45 dBm was extracted based on a two-tone measurement technique in the operating bandwidth with different frequency spacing values. The memory effect based on AM/AM and AM/PM conversions was also characterized using a modulated WiMAX signal of 10 MHz bandwidth at 5.8 GHz. Furthermore, a broadband Wilkinson combiner was designed for the same bandwidth with very low loss to extend the overall output power. Excellent agreement between simulated and measured PA performances was also achieved.

scholarly journals A Precise Harmonic Control Technique for High Efficiency Concurrent Dual-Band Continuous Class-F Power Amplifier

IEEE Access ◽  
2018 ◽  
Vol 6 ◽  
pp. 51864-51874 ◽  
Author(s):  
Zhenxing Yang ◽  
Yao Yao ◽  
Mingyu Li ◽  
Yi Jin ◽  
Tian Li ◽  
...  
Keyword(s):  
Power Amplifier ◽  
High Efficiency ◽  
Dual Band ◽  
Control Technique ◽  
Harmonic Control ◽  
Class F

A 60 GHz 14 dBm power amplifier with a transformer-based power combiner in 65 nm CMOS

2011 ◽  
Vol 3 (2) ◽  
pp. 99-105 ◽  
Author(s):  
Dixian Zhao ◽  
Ying He ◽  
Lianming Li ◽  
Dieter Joos ◽  
Wim Philibert ◽  
...  
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Peak Power ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
60 Ghz ◽  
Power Combiner ◽  
Power Added Efficiency ◽  
Saturated Output Power

A 52–61 GHz power amplifier (PA) is implemented in 65 nm bulk complementary metal oxide semiconductor (CMOS) technology. The proposed PA employs a transformer-based power combiner to sum the output power from two unit PAs. Each unit PA uses transformer-coupled two-stage differential cascode topology. The differential cascode PA is able to increase the output power and ensure stability. The transformer-based passives enable a compact layout with the PA core area of only 0.3 mm2. The PA achieves a peak power gain of 10.2 dB with 3-dB bandwidth of 9 GHz. The measured saturated output power is 14.8 dBm with a peak power-added efficiency (PAE) of 7.2%. The reverse isolation is smaller than −33 dB from 25 to 65 GHz. The PA consumes a quiescent current of 143 mA from a 1.6 V supply.

scholarly journals Design of Class F Power Amplifier for 2.4ghz using Third Harmonics

2019 ◽  
Vol 8 (3) ◽  
pp. 7370-7375
Keyword(s):  
Power Amplifier ◽  
Large Scale ◽  
High Efficiency ◽  
Supply Voltage ◽  
Travelling Wave ◽  
Input Power ◽  
Engineering Research ◽  
Power Added Efficiency ◽  
Amplification Process ◽  
Class F

Historically, travelling wave tube amplifier (TWTA) has been a common type of Microwave amplifier used commonly in terrestrial and space application due to their high efficiency and power handling capacity. However due to their bulky nature and also being very expensive, it is difficult to use them commercially in a large scale. Inspired by the advantage such as very less development cost, minimum supply voltage, gradual degradation and numerous commercial applications, Solid State Power Amplifier (SSPA) has been the replacement to vacuum tube Technology. The efficiency of the amplifier is one of the most important task in the microwave engineering research. An important figure of merit, power-added efficiency (PAE), is the main focus. Hence in this paper, class F Power amplifier is designed for 2.4GHz frequency. Class F Amplifier is also called as wave shaping amplifier since the harmonics generated helps the amplification process. The class f PA is biased nearer to the class B amplifier (close cut-off area) so the transistor can move back and forth rapidly to produce the harmonics. The efficiency of class F amplifier depends on how many harmonics are used for the amplification process. Here, the amplification process is performed up to the third harmonics which provides 41.606 dBm output power with 27dBm input power. Also a gain of more than 20.277dBm is achieved when the input given is 27dBm. Several other results like reflection Coefficient and transmission coefficient simulations has also been provided with the power added efficiency (PAE) of 75.402 achieved has also been simulated.

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