scholarly journals Power Management Circuits for Low-Power RF Energy Harvesters

2020 ◽  
Vol 10 (3) ◽  
pp. 29
Author(s):  
Michele Caselli ◽  
Marco Ronchi ◽  
Andrea Boni

The paper describes the design and implementation of power management circuits for RF energy harvesters suitable for integration in wireless sensor nodes. In particular, we report the power management circuits used to provide the voltage supply of an integrated temperature sensor with analog-to-digital converter. A DC-DC boost converter is used to transfer efficiently the energy harvested from a generic radio-frequency rectifier into a charge reservoir, whereas a linear regulator scales the voltage supply to a suitable value for a sensing and conversion circuit. Implemented in a 65 nm CMOS technology, the power management system achieves a measured overall efficiency of 20%, with an available power of 4.5 μW at the DC-DC converter input. The system can sustain a temperature measurement rate of one sample/s with an RF input power of −28 dBm, making it compatible with the power levels available in generic outdoor environments.

2019 ◽  
Vol 29 (05) ◽  
pp. 2050076
Author(s):  
Mariem Kanoun ◽  
David Cordeau ◽  
Jean-Marie Paillot ◽  
Hassene Mnif ◽  
Mourad Loulou

This paper presents the design and implementation of an RF energy harvester system at 5.8[Formula: see text]GHz for low-power wireless transmission applications. The potential application of the proposed system is to wirelessly power sensor nodes. First, a design methodology of the rectifier based on a theoretical approach is presented. The simulation results show an excellent correlation with the theoretical ones, proving the accuracy of the proposed design methodology. A prototype is fabricated and the simulation results are validated by the measurements. Then, the rectenna is combined to a commercial power management circuit and a load which emulates the behavior of a sensor. The power management circuit boosts and regulates the output DC voltage as well as stores the collected energy into a capacitor. Finally, the complete system is experimentally tested and excellent performances are demonstrated. The efficiency of the RF energy harvester is 24% at [Formula: see text]10[Formula: see text]dBm input power and 47% at [Formula: see text]5[Formula: see text]dBm input power which are the highest reported measured efficiencies at this frequency and at those power levels. The complete rectenna system is able to harvest 4.62[Formula: see text]mJ in 40 s and 192[Formula: see text]s for [Formula: see text]6[Formula: see text]dBm and [Formula: see text]10[Formula: see text]dBm input power, respectively allowing us to power wirelessly low-power electronic devices.


2013 ◽  
Vol 22 (09) ◽  
pp. 1340014 ◽  
Author(s):  
SIDA AMY SHEN ◽  
SHUANG XIE ◽  
WAI TUNG NG

This paper presents a 4-bit windowed delay-line analog-to-digital converter (ADC) implemented in 65 nm CMOS technology for VLSI dynamic voltage scaling power management applications. Good linearity is achieved in the proposed power and area efficient ADC without the use of resistors for compensation. The circuit performance was analyzed theoretically and verified experimentally. The measured DNL is within ±0.25 LSB and INL ±0.15 LSB. It occupies an area of 0.009 mm2. With a sampling rate of 4 MHz, the ADC consumes 14 μW with an ENOB of 4.1 and voltage sensing range from 0.87 V to 1.32 V.


2018 ◽  
Vol 18 (3) ◽  
pp. 27-48 ◽  
Author(s):  
Francesco Dell'Anna ◽  
Tao Dong ◽  
Ping Li ◽  
Yumei Wen ◽  
Zhaochu Yang ◽  
...  

Author(s):  
Julie Roslita Rusli ◽  
Suhaidi Shafie ◽  
Roslina Mohd Sidek ◽  
Hasmayadi Abdul Majid ◽  
W. Z. Wan Hassan ◽  
...  

Power consumption and speed are the main criteria in designing comparator for analog-to-digital converter (ADC).  This paper presents an optimized low voltage low power dynamic comparator which is robust to process, voltage and temperature (PVT) variations with adequate speed.  The comparator circuit was designed using 0.18µm CMOS technology with low voltage supply of 0.8V.  The method used to verify the robustness of the comparator circuit across 45 PVT is presented.  The circuit is simulated with 10% voltage supply variation, five process corners and temperature variation from 0°C to 100°C. The simulation result show that the proposed comparator circuit achieved significant reduction of power consumption and delay during worst case condition compared to dynamic comparator proposed from previous researchers.


Author(s):  
Minh Thuy Le ◽  
Van Duc Ngo ◽  
Thanh Tung Nguyen ◽  
Quoc Cuong Nguyen

Abstract In this study, we present a comprehensive dual-band ambient radio-frequency (RF) energy harvesting system, consisting of rectenna and power management circuit, to harvest energy from 2.45 and 5.8 GHz Wi-Fi. The rectenna employs a metamaterial antenna based on a split-ring resonator, which possesses omni-directional radiation pattern at both frequencies and compact size (0.18λ × 0.25λ at 2.45 GHz). The dual-band rectifier yields the highest efficiency of 42% at 2.45 GHz and 1 dBm input power, 30% at 5.8 GHz and − 7 dBm input power. The maximum RF-DC efficiency for each band is 72% at − 5 dBm and 27% at − 2 dBm, respectively. The power management circuit, consisting of a storing capacitor and a boost converter, is integrated to produce a stable, sufficient output voltage. The energy harvesting system, with its comprehensiveness, is suitable for supplying low-power wireless sensor nodes for indoor applications.


2010 ◽  
Vol 2010 ◽  
pp. 1-6 ◽  
Author(s):  
M. Ferri ◽  
D. Pinna ◽  
E. Dallago ◽  
P. Malcovati

We present a photovoltaic energy harvester, realized in 0.35-μm CMOS technology. The proposed system collects light energy from the environment, by means of 2-mm2on-chip integrated microsolar cells, and accumulates it in an external capacitor. While the capacitor is charging, the load is disconnected. When the energy in the external capacitor is enough to operate the load for a predefined time slot, the load is connected to the capacitor by a power management circuit. The choice of the value of the capacitance determines the operating time slot for the load. The proposed solution is suitable for discrete-time-regime applications, such as sensor network nodes, or, in general, systems that require power supply periodically for short time slots. The power management circuit includes a charge pump, a comparator, a level shifter, and a linear voltage regulator. The whole system has been extensively simulated, integrated, and experimentally characterized.


Author(s):  
Thuy-Linh Nguyen ◽  
Shiho Takahashi ◽  
Van-Trung Nguyen ◽  
Yasuo Sato ◽  
Koichiro Ishibashi

In this paper, the design and evaluations of a cross-couple rectifier (CCR) with floating sub-circuit using Dynamic Threshold MOSFET (DTMOS) for RF energy harvesting is presented. The circuit is fabricated using 65nm Silicon on Thin Buried Box (SOTB) CMOS technology. The measurement result shows that circuit exceeds 1000 mV DC output at -14 dBm input power and obtains 48 % power conversion efficiency (PCE) at a level of -10 dBm input power. The proposed circuit generated 0.9 μW DC output power at a level of -21 dBm input power which equivalent to 10.6 % PCE when harvesting the 950 MHz LTE signal in the ambient environment. The study also indicates the effect of phase difference between the two RF input signals on the DC output voltage in CMOS CCR. The DC output voltage depends on the phase of the two RF input signals and reaches a maximum when the phase difference between the two RF signals is π. Experimental results demonstrate that the output voltage changes from 950 mV to -100 mV when the phase difference varies from π to 0 at an RF input power of -10 dBm. When the rectifier receives an RF signal from the environment at an input power of -21 dBm, the DC output voltage changes from 300 mV to -50 mV when the phase changes from π to 0.


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