scholarly journals 0.5 V CMOS Inverter-Based Transconductance Amplifier with Quiescent Current Control

2021 ◽  
Vol 11 (4) ◽  
pp. 37
Author(s):  
Andrea Ballo ◽  
Salvatore Pennisi ◽  
Giuseppe Scotti
Keyword(s):  
Supply Voltage ◽  
Current Control ◽  
Cmos Inverter ◽  
Class Ab ◽  
Transconductance Amplifier ◽  
Dc Gain ◽  
Unity Gain ◽  
Quiescent Current ◽  
Bulk Technology ◽  
Inverter Topology

A two-stage CMOS transconductance amplifier based on the inverter topology, suitable for very low supply voltages and exhibiting rail-to-rail output capability is presented. The solution consists of the cascade of a noninverting and an inverting stage, both characterized by having only two complementary transistors between the supply rails. The amplifier provides class-AB operation with quiescent current control obtained through an auxiliary loop that utilizes the MOSFETs body terminals. Simulation results, referring to a commercial 28 nm bulk technology, show that the quiescent current of the amplifier can be controlled quite effectively, even adopting a supply voltage as low as 0.5 V. The designed solution consumes around 500 nA of quiescent current in typical conditions and provides a DC gain of around 51 dB, with a unity gain frequency of 1 MHz and phase margin of 70 degrees, for a parallel load of 1 pF and 1.5 MΩ. Settling time at 1% is 6.6 μs, and white noise is 125 nV/Hz.

200 μW CMOS class AB unity-gain buffers with accurate quiescent current control

2010 ◽  
Author(s):  
Antonio J. Lopez-Martin ◽  
Jose Algueta ◽  
Lucia Acosta ◽  
Ramon G. Carvajal ◽  
Jaime Ramirez-Angulo
Keyword(s):  
Current Control ◽  
Class Ab ◽  
Unity Gain ◽  
Quiescent Current

Design of High Gain Folded Cascode OTA-Based Transconductance–Capacitance Loop Filter for PLL Applications

2021 ◽  
pp. 2150263
Author(s):  
Priti Gupta ◽  
Sanjay Kumar Jana
Keyword(s):  
Power Consumption ◽  
Supply Voltage ◽  
High Gain ◽  
Cmos Process ◽  
Operational Transconductance Amplifier ◽  
Loop Filter ◽  
Transconductance Amplifier ◽  
Dc Gain ◽  
Unity Gain ◽  
Folded Cascode

This paper deals with the designing of low-power transconductance–capacitance-based loop filter. The folded cascode-based operational transconductance amplifier (OTA) is designed in this paper with the help of quasi-floating bulk MOSFET that achieved the DC gain of 88.61[Formula: see text]dB, unity gain frequency of 97.86[Formula: see text]MHz and power consumption of 430.62[Formula: see text][Formula: see text]W. The proposed OTA is compared with the exiting OTA structure which showed 19.50% increase in DC gain and 15.11% reduction in power consumption. Further, the proposed OTA is used for the designing of transconductance–capacitance-based loop filter that has been operated at [Formula: see text]3[Formula: see text]dB cut-off frequency of 30.12[Formula: see text]MHz with the power consumption of 860.90[Formula: see text][Formula: see text]W at the supply voltage of [Formula: see text][Formula: see text]V. The transistor-level simulation has been done in 0.18[Formula: see text][Formula: see text]m CMOS process.

Class AB output stage for low voltage CMOS op-amps with accurate quiescent current control

2000 ◽  
Vol 36 (21) ◽  
pp. 1753 ◽  
Author(s):  
A. Torralba ◽  
R.G. Carvajal ◽  
J. Martinez-Heredia ◽  
J. Ramírez-Angulo
Keyword(s):  
Low Voltage ◽  
Current Control ◽  
Output Stage ◽  
Class Ab ◽  
Op Amps ◽  
Quiescent Current

scholarly journals A low quiescent current low dropout voltage regulator with self-compensation

2019 ◽  
Vol 8 (1) ◽  
pp. 65-73
Author(s):  
Chu-Liang Lee ◽  
Roslina Mohd Sidek ◽  
Nasri Sulaiman ◽  
Fakhrul Zaman Rokhani
Keyword(s):  
Supply Voltage ◽  
Drop Out ◽  
Voltage Regulator ◽  
Cmos Process ◽  
Process Technology ◽  
Worst Case ◽  
Unity Gain ◽  
Quiescent Current ◽  
Additional Current ◽  
Loop Stability

This paper proposed a low quiescent current low-dropout voltage regulator (LDO) with self-compensation loop stability. This LDO is designed for Silicon-on-Chip (SoC) application without off-chip compensation capacitor. Worst case loop stability phenomenon happen when LDO output load current (Iload) is zero. The second pole frequency decreased tremendously towards unity-gain frequency (UGF) and compromise loop stability. To prevent this, additional current is needed to keep the output in low impedance in order to maintain second pole frequency. As Iload slowly increases, the unneeded additional current can be further reduced. This paper presents a circuit which performed self-reduction on this current by sensing the Iload. On top of that, a self-compensation circuit technique is proposed where loop stability is selfattained when Iload reduced below 100μA. In this technique, unity-gain frequency (UGF) will be decreaed and move away from second pole in order to attain loop stability. The decreased of UGF is done by reducing the total gain while maintaining the dominant pole frequency. This technique has also further reduced the total quiescent current and improved the LDO’s efficiency. The proposed LDO exhibits low quiescent current 9.4μA and 17.7μA, at Iload zero and full load 100mA respectively. The supply voltage for this LDO is 1.2V with 200mV drop-out voltage. The design is validated using 0.13μm CMOS process technology.

LOW VOLTAGE, LOW POWER CHEBYSHEV FILTER IN 0.18 μm CMOS TECHNOLOGY

2013 ◽  
Vol 22 (07) ◽  
pp. 1350053 ◽  
Author(s):  
S. REKHA ◽  
T. LAXMINIDHI
Keyword(s):  
Low Power ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Transconductance Amplifier ◽  
Low Pass ◽  
Unity Gain ◽  
Design Centering ◽  
Low Supply Voltage

This paper presents an active-RC continuous time filter in 0.18 μm standard CMOS technology intended to operate on a very low supply voltage of 0.5 V. The filter designed, has a 5th order Chebyshev low pass response with a bandwidth of 477 kHz and 1-dB passband ripple. A low-power operational transconductance amplifier (OTA) is designed which makes the filter realizable. The OTA uses bulk-driven input transistors and feed-forward compensation in order to increase the Dynamic Range and Unity Gain Bandwidth, respectively. The paper also presents an equivalent circuit of the OTA and explains how the filter can be modeled using descriptor state-space equations which will be used for design centering the filter in the presence of parasitics. The designed filter offers a dynamic range of 51.3 dB while consuming a power of 237 μW.

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