LOW VOLTAGE, LOW POWER CHEBYSHEV FILTER IN 0.18 μm CMOS TECHNOLOGY

2013 ◽  
Vol 22 (07) ◽  
pp. 1350053 ◽  
Author(s):  
S. REKHA ◽  
T. LAXMINIDHI
Keyword(s):  
Low Power ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Transconductance Amplifier ◽  
Low Pass ◽  
Unity Gain ◽  
Design Centering ◽  
Low Supply Voltage

This paper presents an active-RC continuous time filter in 0.18 μm standard CMOS technology intended to operate on a very low supply voltage of 0.5 V. The filter designed, has a 5th order Chebyshev low pass response with a bandwidth of 477 kHz and 1-dB passband ripple. A low-power operational transconductance amplifier (OTA) is designed which makes the filter realizable. The OTA uses bulk-driven input transistors and feed-forward compensation in order to increase the Dynamic Range and Unity Gain Bandwidth, respectively. The paper also presents an equivalent circuit of the OTA and explains how the filter can be modeled using descriptor state-space equations which will be used for design centering the filter in the presence of parasitics. The designed filter offers a dynamic range of 51.3 dB while consuming a power of 237 μW.

An Ultra-Low-Voltage Low-Power Current-Mode True RMS-to-DC Converter

2016 ◽  
Vol 25 (06) ◽  
pp. 1650066 ◽  
Author(s):  
Pantre Kompitaya ◽  
Khanittha Kaewdang
Keyword(s):  
Integrated Circuits ◽  
Low Power ◽  
High Performance ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Circuit Complexity ◽  
Current Mode ◽  
Cmos Technology ◽  
Low Supply Voltage

A current-mode CMOS true RMS-to-DC (RMS: root-mean-square) converter with very low voltage and low power is proposed in this paper. The design techniques are based on the implicit computation and translinear principle by using CMOS transistors that operate in the weak inversion region. The circuit can operate for two-quadrant input current with wide input dynamic range (0.4–500[Formula: see text]nA) with an error of less than 1%. Furthermore, its features are very low supply voltage (0.8[Formula: see text]V), very low power consumption ([Formula: see text]0.2[Formula: see text]nW) and low circuit complexity that is suitable for integrated circuits (ICs). The proposed circuit is designed using standard 0.18[Formula: see text][Formula: see text]m CMOS technology and the HSPICE simulation results show the high performance of the circuit and confirm the validity of the proposed design technique.

scholarly journals A New Low-Voltage Low-Power Dual-Mode VCII-Based SIMO Universal Filter

Electronics ◽  
2019 ◽  
Vol 8 (7) ◽  
pp. 765 ◽  
Author(s):  
Leila Safari ◽  
Gianluca Barile ◽  
Giuseppe Ferri ◽  
Vincenzo Stornelli
Keyword(s):  
Low Power ◽  
Transfer Functions ◽  
Low Voltage ◽  
Supply Voltage ◽  
Building Blocks ◽  
Cmos Technology ◽  
Universal Filter ◽  
Dual Mode ◽  
Input Multiple Output ◽  
Low Pass

In this paper, a new low-voltage low-power dual-mode universal filter is presented. The proposed circuit is implemented using inverting current buffer (I-CB) and second-generation voltage conveyors (VCIIs) as active building blocks and five resistors and three capacitors as passive elements. The circuit is in single-input multiple-output (SIMO) structure and can produce second-order high-pass (HP), band-pass (BP), low-pass (LP), all-pass (AP), and band-stop (BS) transfer functions. The outputs are available as voltage signals at low impedance Z ports of the VCII. The HP, BP, AP, and BS outputs are also produced in the form of current signals at high impedance X ports of the VCIIs. In addition, the AP and BS outputs are also available in inverting type. The proposed circuit enjoys a dual-mode operation and, based on the application, the input signal can be either current or voltage. It is worth mentioning that the proposed filter does not require any component matching constraint and all sensitivities are low, moreover it can be easily cascadable. The simulation results using 0.18 μm CMOS technology parameters at a supply voltage of ±0.9 V are provided to support the presented theory.

An 8-Bit Ultra-Low-Power, Low-Voltage Current Steering DAC Utilizing a New Segmented Structure

2019 ◽  
Vol 28 (10) ◽  
pp. 1950172
Author(s):  
Mehdi Bandali ◽  
Alireza Hassanzadeh ◽  
Masoume Ghashghaie ◽  
Omid Hashemipour
Keyword(s):  
Low Power ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
The Body ◽  
Current Steering ◽  
Ultra Low Power ◽  
Current Cell ◽  
Sample Rate

In this paper, an 8-bit ultra-low-power, low-voltage current steering digital-to-analog converter (DAC) is presented. The proposed DAC employs a new segmented structure that results in low integral nonlinearity (INL) and high spurious-free dynamic range (SFDR). Moreover, this DAC utilizes a low-voltage current cell. The low-voltage characteristic of the current cell is achieved by connecting the body of MOSFET switches to their sources. Utilizing a low supply voltage along with a low bias current in the current cells results in about 623.81-[Formula: see text]W power consumption in 140-MS/s sample rate, which is very small compared to previous reports. The post-layout simulation results in 180-nm CMOS technology and [Formula: see text]-V supply voltage with the sample rate of 140[Formula: see text]MS/s show SFDR [Formula: see text] 64.37[Formula: see text]dB in the Nyquist range. The differential nonlinearity (DNL) and INL of the presented DAC are 0.1254 LSB and 0.1491 LSB, respectively.

scholarly journals Ultra-Low-Voltage Low-Power Bulk-Driven Quasi-Floating-Gate Operational Transconductance Amplifier

2014 ◽  
Vol 2014 ◽  
pp. 1-7 ◽  
Author(s):  
Ziad Alsibai ◽  
Salma Bay Abo Dabbous
Keyword(s):  
Signal Processing ◽  
Power Consumption ◽  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Bias Current ◽  
Floating Gate ◽  
Operational Transconductance Amplifier ◽  
Transconductance Amplifier

A new ultra-low-voltage (LV) low-power (LP) bulk-driven quasi-floating-gate (BD-QFG) operational transconductance amplifier (OTA) is presented in this paper. The proposed circuit is designed using 0.18 μm CMOS technology. A supply voltage of ±0.3 V and a quiescent bias current of 5 μA are used. The PSpice simulation result shows that the power consumption of the proposed BD-QFG OTA is 13.4 μW. Thus, the circuit is suitable for low-power applications. In order to confirm that the proposed BD-QFG OTA can be used in analog signal processing, a BD-QFG OTA-based diodeless precision rectifier is designed as an example application. This rectifier employs only two BD-QFG OTAs and consumes only 26.8 μW.

scholarly journals A Switched-MOSFET Programmable Low-Voltage Filter

2004 ◽  
Vol 1 (1) ◽  
pp. 32-37
Author(s):  
Luís Cléber C. Marques ◽  
Wouter A. Serdijn
Keyword(s):  
Low Power ◽  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Total Current ◽  
Sampled Data ◽  
Current Consumption ◽  
Digitally Programmable ◽  
Low Supply Voltage

This paper describes a digitally programmable low-voltage low-power analogue filter that can be used in hearing-aid circuits. The filter employs the recently introduced switched-MOSFET technique, a sampled-data technique suitable for low supply voltage operation since it avoids the conduction gap of the switches and does not need any dedicated process. The filter was implemented using the DIMES 1.6μm CMOS process and achieves 64 dB dynamic range. The total current consumption, drawn from a 2.2V supply, equals 93μA.

scholarly journals 1.0 V-0.18 µm CMOS Tunable Low Pass Filters with 73 dB DR for On-Chip Sensing Acquisition Systems

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 563
Author(s):  
Jorge Pérez-Bailón ◽  
Belén Calvo ◽  
Nicolás Medrano
Keyword(s):  
Power Consumption ◽  
Dynamic Range ◽  
Low Voltage ◽  
Cutoff Frequency ◽  
Cmos Technology ◽  
Active Area ◽  
Current Steering ◽  
Low Pass ◽  
On Chip ◽  
Low Pass Filters

This paper presents a new approach based on the use of a Current Steering (CS) technique for the design of fully integrated Gm–C Low Pass Filters (LPF) with sub-Hz to kHz tunable cut-off frequencies and an enhanced power-area-dynamic range trade-off. The proposed approach has been experimentally validated by two different first-order single-ended LPFs designed in a 0.18 µm CMOS technology powered by a 1.0 V single supply: a folded-OTA based LPF and a mirrored-OTA based LPF. The first one exhibits a constant power consumption of 180 nW at 100 nA bias current with an active area of 0.00135 mm2 and a tunable cutoff frequency that spans over 4 orders of magnitude (~100 mHz–152 Hz @ CL = 50 pF) preserving dynamic figures greater than 78 dB. The second one exhibits a power consumption of 1.75 µW at 500 nA with an active area of 0.0137 mm2 and a tunable cutoff frequency that spans over 5 orders of magnitude (~80 mHz–~1.2 kHz @ CL = 50 pF) preserving a dynamic range greater than 73 dB. Compared with previously reported filters, this proposal is a competitive solution while satisfying the low-voltage low-power on-chip constraints, becoming a preferable choice for general-purpose reconfigurable front-end sensor interfaces.

A 12-BIT 400-MS/s CURRENT-STEERING DAC WITH DEGLITCHING TECHNIQUE

2014 ◽  
Vol 23 (01) ◽  
pp. 1450004 ◽  
Author(s):  
XIAOBO XUE ◽  
XIAOLEI ZHU ◽  
QIFENG SHI ◽  
LENIAN HE
Keyword(s):  
Dynamic Range ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Signal Frequency ◽  
Current Steering ◽  
Digital To Analog Converter ◽  
Measurement Results ◽  
Voltage Swing ◽  
Current Steering Dac ◽  
Low Supply Voltage

In this paper, a 12-bit current-steering digital-to-analog converter (DAC) employing a deglitching technique is proposed. The deglitching technique is realized by lowering the voltage swing of the control signal as well as by using a method of glitch counteraction (GC). A new switch–driver structure is designed to enable the effectiveness of the GC and provide sufficient driving capability under a low supply voltage. Moreover, the control signal's rise/fall asymmetry which increases the glitch error can be suppressed by using the proposed switch–driver structure. The 12-bit DAC is implemented in 180 nm CMOS technology. The measurement results show that the spurious free dynamic range (SFDR) at low signal frequency is 78.8 dB, and it is higher than 70 dB up to 60 MHz signal frequency at 400 MS/s. The measured INL and DNL are both less than ±0.6 LSB.

scholarly journals Ladder-Based Synthesis and Design of Low-Frequency Buffer-Based CMOS Filters

Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 2931
Author(s):  
Waldemar Jendernalik ◽  
Jacek Jakusz ◽  
Grzegorz Blakiewicz
Keyword(s):  
Dynamic Range ◽  
Low Voltage ◽  
Supply Voltage ◽  
Low Frequency ◽  
Cmos Technology ◽  
Pass Filter ◽  
Low Pass Filter ◽  
Biomedical Sensors ◽  
Filter Synthesis ◽  
Cascade Method

Buffer-based CMOS filters are maximally simplified circuits containing as few transistors as possible. Their applications, among others, include nano to micro watt biomedical sensors that process physiological signals of frequencies from 0.01 Hz to about 3 kHz. The order of a buffer-based filter is not greater than two. Hence, to obtain higher-order filters, a cascade of second-order filters is constructed. In this paper, a more general method for buffer-based filter synthesis is developed and presented. The method uses RLC ladder prototypes to obtain filters of arbitrary orders. In addition, a set of novel circuit solutions with ultra-low voltage and power are proposed. The introduced circuits were synthesized and simulated using 180-nm CMOS technology of X-FAB. One of the designed circuits is a fourth-order, low-pass filter that features: 100-Hz passband, 0.4-V supply voltage, power consumption of less than 5 nW, and dynamic range above 60 dB. Moreover, the total capacitance of the proposed filter (31 pF) is 25% lower compared to the structure synthesized using a conventional cascade method (40 pF).

scholarly journals A design of low voltage OPAMP using split-length transistors

2014 ◽  
Vol 17 (1) ◽  
pp. 62-70
Author(s):  
Khanh Trung Le ◽  
Tu Trong Bui ◽  
Hung Duc Le ◽  
Kha Cong Pham
Keyword(s):  
High Performance ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Technology ◽  
Feedback Systems ◽  
Advanced Technique ◽  
Low Voltage Operation ◽  
Feedback Compensation ◽  
Indirect Feedback ◽  
Low Supply Voltage

In the paper, we present a design of a low voltage Operation Amplifier (OPAMP) circuit using split-length transistors. Indirect feedback compensation is an advanced technique used to stabilize the operation of an OPAMP. Cascode transistors are usually implemented for indirect feedback systems. However, these transistors are not suitable for low voltage design. In this study, we have taken advantage of split-length transistors and indirect feedback compensation technique to design a high performance OPAMP. As a result, the OPAMP operates not only at low supply voltage but also at high frequency. The OPAMP has been designed and fabricated in a 0.18um CMOS technology. This OPAMP achieves 100 dB gain, 90 MHz unity gain frequency and 60 degrees phase margin at 2 V supply voltage.

130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications

2017 ◽  
Vol 26 (08) ◽  
pp. 1740003 ◽  
Author(s):  
Daniel Arbet ◽  
Viera Stopjaková ◽  
Martin Kováč ◽  
Lukáš Nagy ◽  
Matej Rakús ◽  
...  
Keyword(s):  
Low Voltage ◽  
Supply Voltage ◽  
Input Voltage ◽  
Cmos Technology ◽  
Variable Gain Amplifier ◽  
Voltage Range ◽  
Variable Gain ◽  
Wide Scale ◽  
Simulation Results ◽  
Low Supply Voltage

In this paper, a variable gain amplifier (VGA) designed in 130 nm CMOS technology is presented. The proposed amplifier is based on the bulk-driven (BD) design approach, which brings a possibility to operate with low supply voltage. Since the supply voltage of only 0.6 V is used for the amplifier to operate, there is no risk of latch-up event that usually represents the main drawback of the BD circuit systems. BD transistors are employed in the input differential stage, which makes it possible to operate in rail-to-rail input voltage range. Achieved simulation results indicate that gain of the proposed VGA can be varied in a wide scale, which together with the low supply voltage feature make the proposed amplifier useful for low-voltage and low-power applications. An additional circuit responsible for maintaining the linear-in-decibel gain dependency of the VGA is also addressed. The proposed circuit block avails arbitrary shaping of the curve characterizing the gain versus the controlling voltage dependency.

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