scholarly journals Study on Establishing Degradation Model of Chip Solder Joint Material under Coupled Stress

Materials ◽  
2020 ◽  
Vol 13 (8) ◽  
pp. 1813
Author(s):  
Longteng Li ◽  
Bo Jing ◽  
Jiaxing Hu
Keyword(s):  
Solder Joint ◽  
Crack Propagation ◽  
Integrated Circuit ◽  
Solder Joints ◽  
Propagation Time ◽  
Strain Accumulation ◽  
Degradation Model ◽  
Accumulation Time ◽  
Degradation Data ◽  
Coupled Stress

The chip is the core component of the integrated circuit. Degradation and failure of chip solder joints can directly lead to function loss of the integrated circuit. In order to establish the degradation model of chip solder joints under coupled stress, this paper takes quad flat package (QFP) chip solder joints as the study object. First, solder joint degradation data and failure samples were obtained through fatigue tests under coupled stress. Three types of micro failure modes of solder joints were obtained by scanning electron microscope (SEM) analysis and finite element model (FEM) simulation results. Second, the characterization of degradation data was obtained by the principal component of Mahalanobis distance (PCMD) algorithm. It is found that solder joint degradation is divided into three stages: strain accumulation stage, crack propagation stage, and failure stage. Later, Coffin–Manson model and Paris model were modified based on the PCMD health index and strain simulation. The function relationship between strain accumulation time, crack propagation time, and strain was determined, respectively. Solder joint degradation models at different degradation stage were established. Finally, through strain simulation, the models can predict the strain accumulation time and failure time effectively under each failure mode, and their prediction accuracy is above 85%.

Effect of Micro Structure on Fatigue Characteristics of Lead Free Solder Joints

2011 ◽  
Author(s):  
Takahiro Akutsu ◽  
Qiang Yu
Keyword(s):  
Grain Size ◽  
Fatigue Crack ◽  
Fatigue Life ◽  
Solder Joint ◽  
Crack Propagation ◽  
Solder Joints ◽  
Lead Free ◽  
Lead Free Solder ◽  
Micro Structure ◽  
Free Solder

This paper presents the influence of the micro structure on the crack propagation in lead free solder joint. The author’s group have studied the Manson-Coffin’s law for lead free solder joint by using the isothermal fatigue test and FEM analytical approaches to establish the practicable evaluation of thermal fatigue life of solder joints, for example, for the Sn-Cu-Ni solder, because this solder is attracted from the aspect of the decrease of solder leach in the flow process and material cost. However, even if the same loading is given to the solder joints of BGA test piece, there was a large dispersion in the fatigue life. Even though the effect of the shape difference has been considered, the range of the dispersion could not been explained sufficiently. In the study, the fatigue crack propagation modes in the solder joints were investigated, and an internal fatigue crack mode and an interfacial fatigue crack mode were confirmed. And the tendency of a shorter on fatigue life in the interfacial fatigue mode was confirmed. To clarify the mechanism of these fatigue crack modes, the crystal grain size in the solder joints was investigated before the fatigue test and also after the test. Furthermore, the verification of the mechanism using FEM models considering the crystal grain size was carried out. First of all, each element in FEM models matching to the average crystal grain size was made. Second, the inelastic strain ranges in each FEM models were studied. As a result, it was shown that the influence of the crude density of the crystal grain to the fatigue crack progress can be evaluated. In addition, the micro structure of the solder joint of large-scale electronic devices is observed, and FEM model was made based on the observation result. As a result, it was shown that the influence of the directionality with the crystal grain to the fatigue crack progress can be evaluated.

scholarly journals Elevated Standoff Heights of Solder Joint Interconnections Can Result in Appreciable Stress and Warpage Relief

2019 ◽  
Vol 16 (1) ◽  
pp. 13-20
Author(s):  
Ephraim Suhir ◽  
Sung Yi ◽  
Jennie S. Hwang ◽  
Reza Ghaffarian
Keyword(s):  
Solder Joint ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Calculated Data ◽  
Circuit Board ◽  
Stress Model ◽  
Solder Material ◽  
The Difference ◽  
Ic Package

Abstract The “head-in-pillow” (HnP) defects in lead-free solder joint interconnections of Integrated Circuit (IC) packages with conventional (small) standoff heights of the solder joints, and particularly in packages with fine pitches, are attributed by many electronic material scientists to the three major causes: attributes of the manufacturing process, solder material properties, and design-related issues. The latter are thought to be caused primarily by elevated stresses in the solder material, as well as by the excessive warpage of the Printed Circuit Board (PCB)-package assembly and particularly by the differences in the thermally induced curvatures of the PCB and the package. In this analysis, the stress and warpage issue is addressed using an analytical predictive stress model. The model is a modification and an extension of the model developed back in 1980s by the first author. It is assumed that it is the difference in the postfabrication deflections of the PCB-package assembly that is the root cause of the solder material failures and particularly and perhaps the HnP defects. The calculated data based on the developed stress model suggest that the replacement of the conventional ball grid array (BGA) designs with designs with elevated standoff heights of the solder joints could result in significant stress and warpage relief and, hopefully, in a lower propensity of the IC package to HnP defects as well. The general concepts are illustrated by a numerical example, in which the responses to the change in temperature of a conventional design, referred to as BGA, and a design with solder joints with elevated standoff heights, referred to as column grid array (CGA), are compared. The computed data indicated that the effective stress in the solder material was relieved by about 40% and the difference between the maximum deflections of the PCB and the package was reduced by about 60%, when the BGA design was replaced by a CGA system. Although no definite proof that the use of solder joints with elevated standoff heights will lessen the package propensity to the HnP defects is provided, the authors nonetheless think that there is a reason to believe that the application of solder joints with elevated standoff heights could result in a substantial improvement in the general IC package performance, including, perhaps, its propensity to HnP defects.

scholarly journals A Novel Multi-Pattern Solder Joint Simultaneous Segmentation Algorithm for PCB Selective Packaging Systems

2019 ◽  
Vol 33 (13) ◽  
pp. 2058005
Author(s):  
Lei Huang ◽  
Shibin Shen ◽  
Fei Xie ◽  
Jing Zhao ◽  
Jianing Han ◽  
...  
Keyword(s):  
Solder Joint ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Printed Circuit Board ◽  
Solder Joints ◽  
Extraction Methods ◽  
Segmentation Algorithm ◽  
Circuit Board ◽  
Packaging System ◽  
Low Efficiency

To prevent any negative electromagnetic influence of high-density integrated circuits, an insulation package needs to be specially designed to shield it. Aiming at the low efficiency and material waste in traditional packaging methods, a printed circuit board (PCB) selective packaging system based on a multi-pattern solder joint simultaneous segmentation algorithm and three-dimensional printing technology is introduced in this paper. Firstly, the structure of PCB selective packaging system is designed. Secondly, to solve the existing problems, such as multi-pattern solder joints which are located densely in small welding areas and are hard to be extracted in the small-area integrated circuit board, a multi-pattern solder joint simultaneous segmentation algorithm is developed based on (geometrical) neighborhood features to extract and locate the optimal PCB solder joint areas. Finally, tests using three actual PCB are carried out to compare the proposed method with traditional multi-threshold solder joint extraction methods. Test results indicate that the proposed algorithm is simple and effective. Diverse solder joints can be optimally located and simultaneously extracted from the collected PCB image, which greatly improves the filling rate of the solder joint areas and filters out false pixels. Thus, this method provides a reliable location-finding tool to help place solder points in PCB selective packaging systems.

Fracture Life Evaluation of Cu-Cored Solder Joint in BGA Package

2009 ◽  
Author(s):  
Hisashi Tanie ◽  
Nobuhiko Chiwata ◽  
Motoki Wakano ◽  
Masaru Fujiyoshi ◽  
Takeyuki Itabashi
Keyword(s):  
Solder Joint ◽  
Crack Propagation ◽  
Shape Analysis ◽  
Fracture Mechanism ◽  
Solder Joints ◽  
Joint Stiffness ◽  
Molten Solder ◽  
Initiation Point ◽  
Mps Method ◽  
Propagation Analysis

A Cu-cored solder joint has an accurate height, a low thermal resistance, and a low electric resistance. However, the fracture mechanism of Cu-cored solder joints has yet to be clarified, and thus the fracture life cannot be predicted. We evaluated the fracture life of Cu-cored solder joints by using our molten-solder-shape analysis and crack-propagation analysis methods. Our molten-solder-shape analysis is based on the moving-particle semi-implicit (MPS) method. In the MPS method, a continuum is expressed as an assembly of particles. In contrast to finite element analysis (FEA), the MPS method can easily express a large deformation and any geometric topology changes, because the continuum does not need to be divided into elements. Using our molten-solder-shape analysis, we could calculate the shapes of Cu-cored solder after the reflow process. Our crack-propagation analysis has a feature where a crack initiation point and the crack propagation paths are automatically calculated and where the fracture life is quantitatively evaluated using FEA. Using our crack-propagation analysis, we could analyze the fracture mechanism of Cu-cored solder joints. By combining our molten-solder-shape and crack-propagation analyses, we could evaluate the fracture life of Cu-cored solder joints in a ball grid array package. As a result, we found that the fracture life of Cu-cored solder joints is longer than that of conventional joints. The height of a joint is one of the reasons for the improved fracture life. Since the height of a Cu-cored solder joint is controlled by the size of the core ball, the height is larger and more highly accurate than that in conventional joints. Accordingly, the solder strain and strain variation are decreased. Joint stiffness is the second reason for the improved fracture life. Cu is harder than solder, so the joint stiffness of a Cu-cored joint is greater than that of conventional joints. Accordingly, the displacement of a joint is decreased. The crack-propagation behavior is the third reason for the improved fracture life. In a conventional solder joint, a solder crack only propagates near the interface of the solder and the land. In a Cu-cored solder joint, a solder crack not only propagates near the interface of the solder and the land, but also at the interface of the solder and core ball. The crack-propagation life is longer than that in a conventional joint due to crack-path scattering. We found that the fracture life of Cu-cored solder joints is improved by using these mechanisms.

IC solder joint inspection based on the Gaussian mixture model

2016 ◽  
Vol 28 (4) ◽  
pp. 207-214 ◽  
Author(s):  
Nian Cai ◽  
Qian Ye ◽  
Gen Liu ◽  
Han Wang ◽  
Zhijing Yang
Keyword(s):  
Solder Joint ◽  
Gaussian Mixture Model ◽  
Mixture Model ◽  
Integrated Circuit ◽  
Printed Circuit Boards ◽  
Solder Joints ◽  
Gaussian Mixture ◽  
Content Type ◽  
Solder Joint Inspection ◽  
Frequency Map

Purpose This paper aims to inspect solder joint defects of integrated circuit (IC) components on printed circuit boards. Here, an IC solder joint inspection algorithm is developed based on a Gaussian mixture model (GMM). Design/methodology/approach First, the authors train a GMM using numerous qualified IC solder joints. Then, the authors compare the IC solder joint images with the trained model to inspect the potential defects. Finally, the authors introduce a frequency map and define a metric termed as normalized defect degree to evaluate qualities of the tested IC solder joints. Findings Experimental results indicate that the proposed method is superior to the state-of-the-art methods on IC solder joint inspection. Originality/value The approach is a promising method for IC solder joint inspection, which is quite different from the traditional classifier-based methods.

A Mechanistic Model for Solder Joint Failure Prediction Under Thermal Cycling

1990 ◽  
Vol 112 (2) ◽  
pp. 104-109 ◽  
Author(s):  
Boon Wong ◽  
D. E. Helling
Keyword(s):  
Crack Initiation ◽  
Solder Joint ◽  
Crack Propagation ◽  
Thermal Cycling ◽  
Solder Joints ◽  
Mechanistic Model ◽  
Propagation Model ◽  
Time To Failure ◽  
Surface Mount ◽  
Life Predictions

A mechanistic model for eutectic Pb/Sn solder life predictions has been developed and applied to leadless surface mount solder joints. This model can quantitatively describe both crack initiation and crack propagation processes in the solder. There are four parts to this model: a crack initiation model, a crack propagation model [1], a microstructural coarsening model and an analysis of the deformation in the solder during thermal cycling. By merging these models together, it is possible to predict the time to crack initiation and the time to failure of these solder joints. Solder joint life predictions show good agreement with data obtained on thermally cycled surface mount leadless chip resistors.

scholarly journals Study on the Reliability of Sn–Bi Composite Solder Pastes with Thermosetting Epoxy under Thermal Cycling and Humidity Treatment

Crystals ◽  
2021 ◽  
Vol 11 (7) ◽  
pp. 733
Author(s):  
Lu Liu ◽  
Songbai Xue ◽  
Ruiyang Ni ◽  
Peng Zhang ◽  
Jie Wu
Keyword(s):  
Solder Joint ◽  
Thermal Cycling ◽  
Composite Solder ◽  
Solder Joints ◽  
Solder Paste ◽  
Epoxy System ◽  
Mechanical Reinforcement ◽  
Microstructure Observation ◽  
Temperature And Humidity ◽  
Thermosetting Epoxy

In this study, a Sn–Bi composite solder paste with thermosetting epoxy (TSEP Sn–Bi) was prepared by mixing Sn–Bi solder powder, flux, and epoxy system. The melting characteristics of the Sn–Bi solder alloy and the curing reaction of the epoxy system were measured by differential scanning calorimeter (DSC). A reflow profile was optimized based on the Sn–Bi reflow profile, and the Organic Solderability Preservative (OSP) Cu pad mounted 0603 chip resistor was chosen to reflow soldering and to prepare samples of the corresponding joint. The high temperature and humidity reliability of the solder joints at 85 °C/85% RH (Relative Humidity) for 1000 h and the thermal cycle reliability of the solder joints from −40 °C to 125 °C for 1000 cycles were investigated. Compared to the Sn–Bi solder joint, the TSEP Sn–Bi solder joints had increased reliability. The microstructure observation shows that the epoxy resin curing process did not affect the transformation of the microstructure. The shear force of the TSEP Sn–Bi solder joints after 1000 cycles of thermal cycling test was 1.23–1.35 times higher than the Sn–Bi solder joint and after 1000 h of temperature and humidity tests was 1.14–1.27 times higher than the Sn–Bi solder joint. The fracture analysis indicated that the cured cover layer could still have a mechanical reinforcement to the TSEP Sn–Bi solder joints after these reliability tests.

Crack Propagation Experiments on Flip Chip Solder Joints

1998 ◽  
Vol 515 ◽  
Author(s):  
S. Wiese ◽  
F. Feustel ◽  
S. Rzepka ◽  
E. Meusel
Keyword(s):  
Crack Propagation ◽  
Flip Chip ◽  
Solder Joints ◽  
Shear Loading ◽  
Displacement Curve ◽  
In Situ Experiments ◽  
Propagation Experiment ◽  
Crack Propagation Experiment ◽  
Number Of Cycles ◽  
Force Displacement

ABSTRACTThe paper presents crack propagation experiments on real flip chip specimens applied to reversible shear loading. Two specially designed micro testers will be introduced. The first tester provides very precise measurements of the force displacement hysteresis. The achieved resolutions have been I mN for force and 20 nm for displacement. The second micro tester works similar to the first one, but is designed for in-situ experiments inside the SEM. Since it needs to be very small in size it reaches only resolutions of 10 mN and 100nm, which is sufficient to achieve equivalence to the first tester. A cyclic triangular strain wave is used as load profile for the crack propagation experiment. The experiment was done with both machines applying equivalent specimens and load. The force displacement curve was recorded using the first micro mechanical tester. From those hysteresis, the force amplitude has been determined for every cycle. All force amplitudes are plotted versus the number of cycles in order to quantify the crack length. With the second tester, images were taken at every 10th … 100th cycle in order to locate the crack propagation. Finally both results have been linked together for a combined quatitive and spatial description of the crack propagation in flip chip solder joints.

Effect of intermetallic compound layer thickness on the shear strength of 1206 chip resistor solder joint

2015 ◽  
Vol 27 (1) ◽  
pp. 52-58 ◽  
Author(s):  
Peter K. Bernasko ◽  
Sabuj Mallik ◽  
G. Takyi
Keyword(s):  
Shear Strength ◽  
Intermetallic Compound ◽  
Solder Joint ◽  
Layer Thickness ◽  
Solder Joints ◽  
Ageing Time ◽  
Circuit Board ◽  
Intermetallic Compound Layer ◽  
Content Type ◽  
Surface Mount

Purpose – The purpose of this paper is to study the effect of intermetallic compound (IMC) layer thickness on the shear strength of surface-mount component 1206 chip resistor solder joints. Design/methodology/approach – To evaluate the shear strength and IMC thickness of the 1206 chip resistor solder joints, the test vehicles were conventionally reflowed for 480 seconds at a peak temperature of 240°C at different isothermal ageing times of 100, 200 and 300 hours. A cross-sectional study was conducted on the reflowed and aged 1206 chip resistor solder joints. The shear strength of the solder joints aged at 100, 200 and 300 hours was measured using a shear tester (Dage-4000PXY bond tester). Findings – It was found that the growth of IMC layer thickness increases as the ageing time increases at a constant temperature of 175°C, which resulted in a reduction of solder joint strength due to its brittle nature. It was also found that the shear strength of the reflowed 1206 chip resistor solder joint was higher than the aged joints. Moreover, it was revealed that the shear strength of the 1206 resistor solder joints aged at 100, 200 and 300 hours was influenced by the ageing reaction times. The results also indicate that an increase in ageing time and temperature does not have much influence on the formation and growth of Kirkendall voids. Research limitations/implications – A proper correlation between shear strength and fracture mode is required. Practical implications – The IMC thickness can be used to predict the shear strength of the component/printed circuit board pad solder joint. Originality/value – The shear strength of the 1206 chip resistor solder joint is a function of ageing time and temperature (°C). Therefore, it is vital to consider the shear strength of the surface-mount chip component in high-temperature electronics.

Sign in / Sign up

Export Citation Format

Share Document