Indium-Based Micro-Bump Array Fabrication Technology with Added Pre-Reflow Wet Etching and Annealing

Indium-based micro-bump arrays, among other things, are used for the bonding of infrared photodetectors and focal plane arrays. In this paper, several aspects of the fabrication technology of micrometer-sized indium bumps with a smooth surface morphology were investigated. The thermal evaporation of indium has been optimized to achieve ~8 μm-thick layers with a small surface roughness of Ra = 11 nm, indicating a high packing density of atoms. This ensures bump uniformity across the sample, as well as prevents oxidation inside the In columns prior to the reflow. A series of experiments to optimize indium bump fabrication technology, including a shear test of single columns, is described. A reliable, repeatable, simple, and quick approach was developed with the pre-etching of indium columns in a 10% HCl solution preceded by annealing at 120 °C in N2.

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Optimization of indium bump preparation in infrared focal plane array fabrication

10.1117/12.2071086 ◽

2014 ◽

Author(s):

Zhijin Hou ◽

Junjie Si ◽

Wei Wang ◽

Haizhen Wang ◽

Liwen Wang

Keyword(s):

Focal Plane ◽

Focal Plane Array ◽

Infrared Focal Plane Array ◽

Indium Bump ◽

Array Fabrication

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Properties of Graphite Interconnect Circuit Boards with Anisotropic Thermal Expansion

MRS Proceedings ◽

10.1557/proc-216-385 ◽

1990 ◽

Vol 216 ◽

Author(s):

J. Malamas ◽

R.P. Bambha ◽

J.B. Ramsey ◽

W.C. Garrett ◽

E.G. Kelso ◽

...

Keyword(s):

Thin Films ◽

Electrical Conductivity ◽

Thermal Expansion ◽

Focal Plane ◽

Thermal Stresses ◽

Focal Plane Arrays ◽

Circuit Board ◽

Circuit Boards ◽

Anisotropic Thermal Expansion ◽

Indium Bump

ABSTRACTWe report the investigation of an interconnect circuit board (ICB) with anisotropic thermal expansion for use with bump bonded, indirect hybrid, scanning focal plane arrays. This ICB is designed to reduce significantly the thermal stresses on the indium bump bonds during thermal cycling. Highly oriented pyrolitic graphite (HOPG) was chosen because its anisotropic thermal expansion meets the criteria for forming an indirect hybrid ICB using silicon processor circuits and mecury cadmium telluride detectors. Properties of HOPG influencing its performance as an ICB have been investigated including thermal expansion, electrical conductivity, durability, and adherence of electrically insulating thin films.

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Experiments on Freeze-Bonding Between Ice Blocks in Floating Ice rubble

Journal of Glaciology ◽

10.1017/s0022143000012107 ◽

1986 ◽

Vol 32 (112) ◽

pp. 397-403 ◽

Cited By ~ 15

Author(s):

R. Ettema ◽

J.A. Schaefer

Keyword(s):

Tap Water ◽

Contact Period ◽

Distilled Water ◽

River Waters ◽

Air Temperatures ◽

Strength Behavior ◽

Series Of Experiments ◽

Bond Strengths ◽

Saline Solutions ◽

Thick Layers

AbstractSeries of experiments were conducted with the aim of determining the influences of the following factors on freeze-bonding between contacting ice blocks in floating ice rubble: pressure normal to the contact plane, period and area of contact, and salinity of the water in which freeze-bonding occurred. Freeze-bonding between ice blocks in air was also investigated. The experiments were conducted with water and air temperatures of about 0°C and normal pressures, between ice blocks, up to 4 kPa. This range of normal pressures may occur hydrostatically between ice blocks in layers of floating ice rubble up to about 10 m thick, or in 2-3 m thick layers which are in a passive Rankine state of pressure. The experiments show that stronger freeze-bonds develop between ice blocks in distilled water, tap water, and water from the Iowa River than develop between ice blocks contacting in air at 0°C. However, stronger freeze-bonds developed in air at 0°C than developed between ice blocks in 0°C saline (NaCl) solutions with salinities in excess of 12.5% by weight. The strength of freeze-bonding increased linearly with contact period for ice blocks in distilled, tap, and river waters, but did not increase with contact period for ice blocks contacting in saline solutions or in air. The results of the experiments are useful contributions to explanations of the shear-strength behavior of a layer of floating ice rubble. For example, thicker layers of ice rubble may show greater cohesive behavior, because normal pressures and thus freeze-bond strengths increase with layer thickness.

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Recent advances in heteroepitaxial Ge/Si(100) and Ge/Si(l 11)

Proceedings, annual meeting, Electron Microscopy Society of America ◽

10.1017/s0424820100171924 ◽

1994 ◽

Vol 52 ◽

pp. 838-839

Author(s):

J. B. Posthill ◽

D. P. Malta ◽

R. Pickett ◽

M. L. Timmons ◽

T. P. Humphreys ◽

...

Keyword(s):

Focal Plane ◽

High Mobility ◽

Epitaxial Films ◽

Focal Plane Arrays ◽

Si Substrate ◽

Large Area ◽

Lattice Match ◽

Temperature Growth ◽

X Ray ◽

Indium Bump

Heteroepitaxial Ge-on-Si could have many applications which include: high mobility p-channel fieldeffect transistors (FETs), large area Ge-based IR or X-ray detectors, or as a substrate for the growth of other epitaxial semiconductors. In particular, the close lattice match between Ge and GaAs and Ge and ZnSe offers a potential for Ge to be used as an interlayer for a GaAs/Si or ZnSe/Si technology.Additionally, with the Si substrate as the "foundation" for further epitaxial semiconductors, thereisa built-in thermal match for any device that must be intimately bonded to Si-based circuitry. Thisis particularly critical in the case of HgCdTe IR focal plane arrays that are indium bump-bonded to aSi multiplexer which will experience thermal cycling in use. This contribution briefly reviews some ofour recent results in the high temperature growth of Ge epitaxial films on Si(100) and Si(l 11) substrates which are being developed for use as a template for HgCdTe/CdZnTe growth.

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The Effect of Substrate Temperatures on CdS Film Prepared by Thermal Evaporation

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.291-294.33 ◽

2013 ◽

Vol 291-294 ◽

pp. 33-37 ◽

Cited By ~ 3

Author(s):

Qiu Ping Shao ◽

Hua Zhang ◽

Chuan Ling Men ◽

Ziao Tian ◽

Zheng Hua An

Keyword(s):

Solar Cells ◽

High Performance ◽

Thermal Evaporation ◽

Fabrication Technology ◽

X Ray ◽

Glass Substrates ◽

Improved Performance ◽

Cigs Solar Cells ◽

Cds Film ◽

Substrate Temperatures

A suitable deposition method of CdS is necessary for the high performance CIGS(Cu(In0.7Ga0.3)Se2.2) solar cells. In this paper, CdS films were deposited onto glass substrates at the substrate temperture of 50°C、100°C、150°C by thermal evaporation, the effect of the temperature were presented. CdS film deposited at substrate temperture of 150°C was annealed at 150°C for 30min. All films were characterized for their morphology, structure and optical property using scanning electron microscope(SEM), X-ray diffractometer(XRD) and UV–VIS–IR transmittance respectively.The quantum efficiency of the fabricated solar cells with annealed CdS buffer layer was also enhanced at short wavelength. This new method leads to the improved performance of CIGS solar cells and also simplify the whole fabrication technology.

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CoSi2 Formation Through Co/Ti Multilayer Reacting with Si-(100) Substrate

MRS Proceedings ◽

10.1557/proc-238-587 ◽

1991 ◽

Vol 238 ◽

Cited By ~ 6

Author(s):

Feng Hong ◽

Bijoy Patnaik ◽

George A. Rozgonyi

Keyword(s):

Barrier Layer ◽

Thermal Evaporation ◽

Annealing Process ◽

Wet Etching ◽

Cobalt Disilicide ◽

Film Resistivity ◽

Si Substrates ◽

Dual Source ◽

Selective Diffusion ◽

Diffusion Membrane

ABSTRACTIn this work, Co/Ti multilayers were deposited on Si-(100) substrates by dual source thermal evaporation. Oxygen was found to be selectively incorporated into the Ti layers during the deposition. The samples were then treated by a two step annealing process. A —6nm Co2Si + CoSi2 layer was formed at the original Ti/Si interface after a 550°C, 2hr. annealing. The Ti(O) layers acted as selective diffusion membrane for Co and Si during this interaction. The morphology of the suicide layer was dependent on the thickness of the Ti(O) barrier layer. Selective removal via wet etching of the upper layers and a 750°C annealing produced stoichiometric and uniform epitaxial cobalt disilicide with a reduced film resistivity. A very flat top surface with no sign of groving or agglomeration and a much improved interface with the Si substrates were obtained.

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Key Fabrication Technology Research of Exploding Foil Initiator

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.347-350.1207 ◽

2013 ◽

Vol 347-350 ◽

pp. 1207-1210

Author(s):

Jun Jun Lv ◽

Qing Xuan Zeng ◽

Ming Yu Li ◽

Qing Xia Yu

Keyword(s):

Electron Microscope ◽

Scanning Electron Microscope ◽

Magnetron Sputtering ◽

Production Process ◽

Low Cost ◽

Wet Etching ◽

Technology Research ◽

Fabrication Technology ◽

Manufacturing Method ◽

Scanning Electron

In order to realize consistency and low cost in the production process of the exploding foil initiator, the manufacturing method of exploding foil initiator was studied using micro processing technology. Microcrystalline glass was used as substrate, and magnetron sputtering,photolithography and wet etching technology were utilized to product the metal bridge foil on the surface of the substrate. SU-8 photoresist was used as the barrel material and scanning electron microscope was exploited to characterize structure of the initiator. Through the electrical tests, the flyer was successfully generated and after the barrel had a good integrity.

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Back-channel Etched In-Ga-Zn-O Thin-film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain

10.20944/preprints202109.0513.v1 ◽

2021 ◽

Author(s):

Rauf Khan ◽

Muhamad Affiq Bin Misran ◽

Reiji Hattori

Keyword(s):

Thin Film ◽

Electrical Properties ◽

Active Layer ◽

Threshold Voltage ◽

Thermal Evaporation ◽

Thin Film Transistor ◽

Wet Etching ◽

Electrical Performance ◽

Saturation Region ◽

Photolithography Process

The electrical performance of the back-channel etched Indium–Gallium–Zinc–Oxide (IGZO) thin-film transistors (TFTs) with copper (Cu) source and drain (S/D) which are patterned by a selective etchant was investigated. The Cu S/D were fabricated on molybdenum (Mo) layer to prevent the Cu diffusion to the active layer (IGZO). We deposited the Cu layer using thermal evaporation and performed the selective wet etching of Cu using non-acidic special etchant without damaging the IGZO active layer. We fabricated the IGZO TFTs and compare the performance in terms of linear and saturation region mobility, threshold voltage and ON current (ION). The IGZO TFTs with Mo/Cu S/D exhibits good electrical properties as the linear region mobility is 12.3 cm2/V-s, saturation region mobility is 11 cm2/V-s, threshold voltage is 1.2 V and ION is 3.16 x 10-6 A. We patterned all the layers by photolithography process. Finally, we introduced SiO2-ESL layer to protect the device from the external influence. The results show that the prevention of Cu and introduced ESL layer enhances the electrical properties of IGZO TFTs.

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