scholarly journals Python-Based Open-Source Electro-Mechanical Co-Optimization System for MEMS Inertial Sensors

Micromachines ◽  
2021 ◽  
Vol 13 (1) ◽  
pp. 1
Author(s):  
Rui Amendoeira Esteves ◽  
Chen Wang ◽  
Michael Kraft
Keyword(s):  
Rapid Growth ◽  
Inertial Sensors ◽  
Human Life ◽  
Fem Analysis ◽  
Software Tool ◽  
Open Loop ◽  
Design Flow ◽  
Optimization Process ◽  
System Level ◽  
Simulation And Optimization

The surge in fabrication techniques for micro- and nanodevices gave room to rapid growth in these technologies and a never-ending range of possible applications emerged. These new products significantly improve human life, however, the evolution in the design, simulation and optimization process of said products did not observe a similarly rapid growth. It became thus clear that the performance of micro- and nanodevices would benefit from significant improvements in this area. This work presents a novel methodology for electro-mechanical co-optimization of micro-electromechanical systems (MEMS) inertial sensors. The developed software tool comprises geometry design, finite element method (FEM) analysis, damping calculation, electronic domain simulation, and a genetic algorithm (GA) optimization process. It allows for a facilitated system-level MEMS design flow, in which electrical and mechanical domains communicate with each other to achieve an optimized system performance. To demonstrate the efficacy of the methodology, an open-loop capacitive MEMS accelerometer and an open-loop Coriolis vibratory MEMS gyroscope were simulated and optimized—these devices saw a sensitivity improvement of 193.77% and 420.9%, respectively, in comparison to their original state.

A framework for high-level simulation and optimization of fine-grained reconfigurable architectures

SIMULATION ◽  
2018 ◽  
Vol 95 (8) ◽  
pp. 737-751
Author(s):  
Muhammad Adeel Pasha ◽  
Umer Farooq ◽  
Bilal Siddiqui
Keyword(s):  
Design Flow ◽  
Reconfigurable Architecture ◽  
System Level ◽  
Reconfigurable Architectures ◽  
Power Efficient ◽  
Simulation And Optimization ◽  
Fine Grained ◽  
System Level Simulation ◽  
Daunting Task ◽  
High Level

Field Programmable Gate Arrays (FPGAs), due to their programmability, have become a popular design choice for control and processing blocks of modern-day digital design. However, this flexibility makes them larger, slower, and less power-efficient when compared to Application Specific Integrated Circuits (ASICs). On the other hand, ASICs have their own drawbacks, such as lack of programmability and inflexibility. One potential solution is specialized fine-grained reconfigurable architectures that have improved flexibility over ASICs and better resource utilization than FPGAs. However, designing a fine-grained reconfigurable architecture is a daunting task in itself due to lack of high-level design-flow support. This article proposes an automated design-flow for the system-level simulation, optimization, and resource estimation of generic as well as custom fine-grained reconfigurable architectures. The proposed framework is generic in nature as it can be used for both control-oriented and compute-intensive applications and then generates a homogeneous or heterogeneous reconfigurable architecture for them. Four sets of homogeneous and heterogeneous benchmarks are used in this work to show the efficacy of our proposed design-flow, and simulation results reveal that our framework can generate both generic and custom fine-grained reconfigurable architectures. Moreover, the area and power estimations show that auto-generated domain-specific reconfigurable architectures are 76% and 73% more area and power-efficient, respectively, than generic FPGA-based implementations. These results are consistent with the savings reported for manual designs in the literature.

IP-TUNNELING OF KNX BUILDING AUTOMATION SYSTEM AS AN IOT REABILITY STUDY

2021 ◽  
pp. 47-50
Author(s):  
Abdullatif Y. M. Alhatem
Keyword(s):  
Rapid Growth ◽  
Communication System ◽  
Human Life ◽  
The Internet ◽  
Automation System ◽  
Global Communication ◽  
Building Automation ◽  
Building Automation System ◽  
Ip Network ◽  
Technological Developments

At the present time the smart technology enhanced to be utilized for the human life in many elds, especially in the houses. The building automation experienced a rapid growth in techniques and methods to provide an advanced management for operational advantages in buildings and develop the equipment in the houses to the consumption of energy and operation. When the KNX system has been developed to be the most important building automation, the ethernet system has evolved to be global communication system and use it as automation system. Among the various technological developments is IoT, which is the essential development the future achievement via the internet techniques, Meanwhile the different available communication mediums of KNX and the need of utilizing IP network in compiling extensive areas of KNX has led us to conduct this comparison.

scholarly journals Approximator: A Software Tool for Automatic Generation of Approximate Arithmetic Circuits

Computers ◽  
2022 ◽  
Vol 11 (1) ◽  
pp. 11
Author(s):  
Padmanabhan Balasubramanian ◽  
Raunaq Nayar ◽  
Okkar Min ◽  
Douglas L. Maskell
Keyword(s):  
Software Tool ◽  
Digital Signal ◽  
Automatic Generation ◽  
Arithmetic Circuits ◽  
Design Flow ◽  
Attractive Alternative ◽  
Design Environment ◽  
Verilog Hdl ◽  
Arithmetic Circuit ◽  
Practical Applications

Approximate arithmetic circuits are an attractive alternative to accurate arithmetic circuits because they have significantly reduced delay, area, and power, albeit at the cost of some loss in accuracy. By keeping errors due to approximate computation within acceptable limits, approximate arithmetic circuits can be used for various practical applications such as digital signal processing, digital filtering, low power graphics processing, neuromorphic computing, hardware realization of neural networks for artificial intelligence and machine learning etc. The degree of approximation that can be incorporated into an approximate arithmetic circuit tends to vary depending on the error resiliency of the target application. Given this, the manual coding of approximate arithmetic circuits corresponding to different degrees of approximation in a hardware description language (HDL) may be a cumbersome and a time-consuming process—more so when the circuit is big. Therefore, a software tool that can automatically generate approximate arithmetic circuits of any size corresponding to a desired accuracy would not only aid the design flow but also help to improve a designer’s productivity by speeding up the circuit/system development. In this context, this paper presents ‘Approximator’, which is a software tool developed to automatically generate approximate arithmetic circuits based on a user’s specification. Approximator can automatically generate Verilog HDL codes of approximate adders and multipliers of any size based on the novel approximate arithmetic circuit architectures proposed by us. The Verilog HDL codes output by Approximator can be used for synthesis in an FPGA or ASIC (standard cell based) design environment. Additionally, the tool can perform error and accuracy analyses of approximate arithmetic circuits. The salient features of the tool are illustrated through some example screenshots captured during different stages of the tool use. Approximator has been made open-access on GitHub for the benefit of the research community, and the tool documentation is provided for the user’s reference.

Structure Characteristic Analysis and Optimization Design for Microsatellite

2010 ◽  
Vol 431-432 ◽  
pp. 425-428
Author(s):  
Kan Zheng ◽  
Wen He Liao ◽  
Xiang Zhang
Keyword(s):  
Optimization Design ◽  
Plate Thickness ◽  
Fem Analysis ◽  
Optimization Process ◽  
Structure Characteristic ◽  
Characteristic Analysis ◽  
Design Variables ◽  
Mechanics Characteristic ◽  
Quadratic Programming Method ◽  
Panel Thickness

According to the structural layout and mechanics characteristic of microsatellite, the FEM was established reasonably. Base on the FEM analysis and its characteristics, the structure of microsatellite was optimization designed. In the optimization process, the optimization model was established with the design variables of aluminum panel thickness, core plate thickness and skeleton thickness, and subjected to stiffness, strength, displacement and size constraints. Then, used the sequential quadratic programming method for optimization analysis. The results of the optimization demonstrates that the weight of structure loss significantly, and the whole structure weight of the microsatellite loss 11%.Meanwhile, the iterative times of the optimization process is few, so it is very Meaningful and useful for actual project application.

Advanced Package Design: Inter-Domain Design Methodologies

2019 ◽  
Vol 2019 (1) ◽  
pp. 000284-000288
Author(s):  
Bill Acito ◽  
Keyword(s):  
Design Flow ◽  
Advanced Technology ◽  
System Level ◽  
Management Tool ◽  
Design System ◽  
System Management ◽  
Next Generation ◽  
Ic Design ◽  
Package Design ◽  
Ic Package

Abstract Just as we transitioned from simplistic lead frames to large ball grid arrays decades ago, we find ourselves again at another inflection point in design. Originally a derivative of PCB design, IC package design finds itself straddling both PCB-style design and traditional IC design. Dimensions have shrunk to place IC package design squarely in the same design dimensions as integrated circuits. Likewise, with Moore's law rapidly losing steam to support SoC's as a system integration vehicle, advanced package technologies have been asked to fill the system enablement gap. We now see advanced packaging technologies with silicon content as the system enabler in 2.5D, 3D and fanout wafer-level packaging. Because of the silicon and small geometries, IC design flows and signoff mechanisms are being used to design the next-generation of packaged systems. Package design now finds itself in the forefront of system-level design enablement. Where once system aggregation was done in a SoC at the silicon level, packaging is being used to build a system from technology-optimized die from each functional area (memory, processing, and interfaces). Silicon is no longer just a substrate material for IC manufacturing but a “package” substrate and functional integration vehicle. As such, package design teams find themselves adding IC-based design flows and methodologies. Package designers must look to the IC tools for routing, DRC, and signoff capabilities. Designers are looking for next-generation EDA tools to support these new integration and design challenges, including LVS-like validation checks and IC-based design rules. Rather than transitioning the design team from traditional packaging tools to IC tools entirely, we propose that users can leverage complete design flows that merge the best-in-class capabilities from each of their respective design domains. Is this regard, the best-in-class capabilities can remain in their respective domains, and a design flow can be created that relies on tight integration between both domains. These flows can also leverage a single point of entry for design capture and system level management. Flows based on the system management tool and the appropriate features in each of the domains can be created that enable and optimize complex designs that meet physical, signal integrity, cost and performance requirements. We will describe how capabilities can be leveraged from both domains in a tightly coupled flow, overseen by a design system-management tool, to address the challenges of advanced-technology and silicon-based system.

Automatic Thermal Modeling for System Level Design of Electronic Equipment

2003 ◽  
Author(s):  
Kenichiro Aoki ◽  
Koichi Shimizu ◽  
Akira Ueda ◽  
Akira Tamura ◽  
Masanori Motegi
Keyword(s):  
Model Building ◽  
Software Tool ◽  
System Level ◽  
Analysis Model ◽  
Accurate Analysis ◽  
Fluid Analysis ◽  
Analytical Accuracy ◽  
Thermal Fluid Analysis ◽  
Short Time ◽  
Large Investment

The development of hardware needs cost reduction by shortening a development period and reducing experimental man-hour. In order to satisfy these demands, thermal fluid analysis with higher accuracy in short time is indispensable for product development. At present, thermal fluid analyses are conducted using different software tools. Each software tool requires model building and meshing for simulations using its own format. That leads to a large investment in time, and therefore cost. VPS/Simulation-Hub software Fujitsu developed is able to convert data from various CADs. It has the features to create a data fitting to numerical analysis software, create an accurate analysis model, and delete unnecessary components. With these main features, VPS/Simulation-Hub greatly contributes to the man-hour reduction for model building and the improvement of analytical accuracy. In this paper, VPS/Simulation-Hub is introduced with the detail explanation of the above 3 main features.

scholarly journals Feasibility Study of Multi Inertial Measurement Unit

Proceedings ◽  
2019 ◽  
Vol 42 (1) ◽  
pp. 74 ◽  
Author(s):  
Ariel Larey ◽  
Eliel Aknin ◽  
Itzik Klein
Keyword(s):  
Inertial Measurement Unit ◽  
Inertial Sensors ◽  
Low Cost ◽  
Software Tool ◽  
Experimental Results ◽  
Measurement Unit ◽  
Outlier Rejection ◽  
Inertial Measurement ◽  
Navigation Solution ◽  
Sensory Data

An inertial measurement unit (IMU) typically has three accelerometers and three gyroscopes. The output of those inertial sensors is used by an inertial navigation system to calculate the navigation solution–position, velocity and attitude. Since the sensor measurements contain noise, the navigation solution drifts over time. When considering low cost sensors, multiple IMUs can be used to improve the performance of a single unit. In this paper, we describe our designed 32 multi-IMU (MIMU) architecture and present experimental results using this system. To analyze the sensory data, a dedicated software tool, capable of addressing MIMUs inputs, was developed. Using the MIMU hardware and software tool we examined and evaluated the MIMUs for: (1) navigation solution accuracy (2) sensor outlier rejection (3) stationary calibration performance (4) coarse alignment accuracy and (5) the effect of different MIMUs locations in the architecture. Our experimental results show that 32 IMUs obtained better performance than a single IMU for all testcases examined. In addition, we show that performance was improved gradually as the number of IMUs was increased in the architecture.

Sign in / Sign up

Export Citation Format

Share Document