Digitalization of production in Altium Designer software

2021 ◽  
pp. 34-42
Author(s):  
S. S. Yudachev ◽  
S. S. Sitnikov ◽  
F. M. Bosy
Keyword(s):  
Printed Circuit Boards ◽  
Electronic Device ◽  
Educational Institution ◽  
Three Dimensional ◽  
Electrical Circuit ◽  
Circuit Board ◽  
Practical Significance ◽  
Three Dimensional Model ◽  
Printed Circuit ◽  
Higher Educational

A method for modeling and printed circuit board layout in the form of a 3D model in one of the digital solutions designed for this task, Altium Designer, is proposed. The practical significance of the work is the study of the basic software libraries in terms of their creation, filling and application when working with the project, as well as of the algorithm for constructing an electrical circuit in the Altium Designer program, layout and design of the simplest circuit on the board. In the course of the work, the algorithm and rules for creating a library of three-dimensional models of components, a library containing conditional graphic designations of the corresponding components, a schematic diagram of the device, a three-dimensional model of the board and the construction of conducting tracks on it are described. The components and circuits used in the work are publicly available on the Internet, which allows anyone to work over the entire algorithm for studying and honing the skills of designing printed circuit boards, both by students studying at a higher educational institution and by fully-fledged specialists. This work can be used not only for teaching students in the field of electronic device development in terms of their design and for organizing laboratory work, but also for creating and designing real devices both in production and within a higher educational institution, for example, for creating a laboratory bench. The introduction and study of this software is carried out at the Department of Radio-Electronic Systems and Complexes of one of the leading engineering universities of the Russian Federation — the Bauman Moscow State Technical University.

Evaluation of new technologies and materials for printed circuit boards with improved heat dissipation properties

Circuit World ◽  
2016 ◽  
Vol 42 (1) ◽  
pp. 32-36 ◽  
Author(s):  
Michal Baszynski ◽  
Edward Ramotowski ◽  
Dariusz Ostaszewski ◽  
Tomasz Klej ◽  
Mariusz Wojcik ◽  
...  
Keyword(s):  
Thermal Properties ◽  
Printed Circuit Boards ◽  
Heat Dissipation ◽  
Printed Circuit Board ◽  
New Technologies ◽  
Electronic Device ◽  
Circuit Board ◽  
New Materials ◽  
Content Type ◽  
Printed Circuit

Purpose – The purpose of this paper is to evaluate thermal properties of printed circuit board (PCB) made with use of new materials and technologies. Design/methodology/approach – Four PCBs with the same layout but made with use of different materials and technologies have been investigated using thermal camera to compare their thermal properties. Findings – The results show how important the thermal properties of PCBs are for providing effective heat dissipation, and how a simple alteration to the design can help to improve the thermal performance of electronic device. Proper layout, new materials and technologies of PCB manufacturing can significantly reduce the temperature of electronic components resulting in higher reliability of electronic and power electronic devices. Originality/value – This paper shows the advantages of new technologies and materials in PCB thermal management.

scholarly journals TECHNOLOGY FOR CREATING THE TOPOLOGY OF PRINTED CIRCUIT BOARDS USING POLYMER 3D MASKS

2021 ◽  
pp. 120-131
Author(s):  
Igor Nevliudov ◽  
Evgeny Razumov-Fryzyuk ◽  
Dmytro Nikitin ◽  
Danila Bliznyuk ◽  
Roman Strelets
Keyword(s):  
3D Printing ◽  
Regression Models ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Experimental Studies ◽  
Three Dimensional ◽  
Circuit Board ◽  
Work Piece ◽  
Circuit Boards ◽  
Printed Circuit

The subject of research is the influence of factors of exposure of two-dimensional images on the topology of conductors in the manufacture of printed circuit boards by the method of three-dimensional polymer photomasks. The purpose of the work is ensuring the accuracy and preservation of the geometric dimensions of the conductors of printed circuit boards during LCD exposure of masks on the work piece. To achieve this goal, it is necessary to solve the following tasks: to analyze photolithography technology and types of polymer 3D printing; to develop a technological process for exposing photopolymer masks to a printed circuit board blank using 3D printing technologies; to conduct experimental studies to determine the optimal exposure parameters; on the basis of the empirical results obtained, to calculate the correlation coefficients of the factors for recall; to construct a linear regression model of the dependence of the deviations of the geometric dimensions of the printed conductors on the parameters of solutions for etching and exposure conditions. Results: The constructed regression models will become the basis for creating a software database that optimizes the initial images of the topology of printed conductors in the automated production of printed circuit boards. This will simplify the process of developing the topology of printed circuit boards, taking into account the real influence of the parameters of the technological operations of etching and exposure on the thickness of the tracks of the conductors of the printed circuit boards, which will reduce the proportion of rejects in the manufacture of single- and double-sided printed circuit boards. Conclusions: an LCD exposure technology and a method for studying the effects of exposure factors on the quality of printed circuit board topology are proposed, which provide sufficient empirical data to create regression models for calculating the influence of technological factors on the final dimensions of conductive paths in the production of printed circuit boards. Further development of the proposed technology will make it possible to manufacture rigid and flexible printed circuit boards completely, with conductive paths, a dielectric base, electronic elements that can be used in various devices.

Heterogeneous Process Development for Electronic Device Packaging with Direct Printed Additive Manufacturing

2012 ◽  
Vol 2012 (1) ◽  
pp. 000961-000966
Author(s):  
R. X. Rodriguez ◽  
K. Church ◽  
X. Chen
Keyword(s):  
Additive Manufacturing ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Process Development ◽  
Electronic Device ◽  
Circuit Board ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Wire Bonds ◽  
The Status

Next generation electronics will not change drastically in function; batteries will last longer, devices will have more functions and devices will take unique shapes, but for the next several years, electronics will travel the path it has been traveling for a couple of decades. To meet the demands of more functions per device and unique shapes, the status quo of electronic manufacturing cannot persist. Solder, wire bonds, FR4, printed circuit boards, surface mount and packaging will fight for survival, but just as hand held phones have evolved, so will the electronics that support them. Standard electronic packaging techniques are reaching size and density limits forcing a search for alternative approaches. The idea of using Additive Manufacturing as an alternative for packaging has not been taken seriously, but there is an opportunity to demonstrate the significant advantages of true 3D electronic packages by allowing the package to be the printed circuit board and by utilizing direct print and bare die approaches to print and structure diverse electronics.

Dielectric Breakdown in Printed Circuit Boards at Elevated Temperatures

1996 ◽  
Author(s):  
P. Singh ◽  
G.T. Galyon ◽  
J. Obrzut ◽  
W.A. Alpaugh
Keyword(s):  
Experimental Data ◽  
Thermal Degradation ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Elevated Temperatures ◽  
Dielectric Breakdown ◽  
Circuit Board ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Data Matching

Abstract A time delayed dielectric breakdown in printed circuit boards, operating at temperatures below the epoxy resin insulation thermo-electrical limits, is reported. The safe temperature-voltage operating regime was estimated and related to the glass-rubber transition (To) of printed circuit board dielectric. The TG was measured using DSC and compared with that determined from electrical conductivity of the laminate in the glassy and rubbery state. A failure model was developed and fitted to the experimental data matching a localized thermal degradation of the dielectric and time dependency. The model is based on localized heating of an insulation resistance defect that under certain voltage bias can exceed the TG, thus, initiating thermal degradation of the resin. The model agrees well with the experimental data and indicates that the failure rate and truncation time beyond which the probability of failure becomes insignificant, decreases with increasing glass-rubber transition temperature.

scholarly journals Estimating Recycling Return of Integrated Circuits Using Computer Vision on Printed Circuit Boards

2021 ◽  
Vol 11 (6) ◽  
pp. 2808
Author(s):  
Leandro H. de S. Silva ◽  
Agostinho A. F. Júnior ◽  
George O. A. Azevedo ◽  
Sergio C. Oliveira ◽  
Bruno J. T. Fernandes
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Electronic Waste ◽  
Decision Criterion ◽  
Economic Feasibility ◽  
Electronic Equipment ◽  
Circuit Board ◽  
Mechanical Recycling ◽  
Printed Circuit

The technological growth of the last decades has brought many improvements in daily life, but also concerns on how to deal with electronic waste. Electrical and electronic equipment waste is the fastest-growing rate in the industrialized world. One of the elements of electronic equipment is the printed circuit board (PCB) and almost every electronic equipment has a PCB inside it. While waste PCB (WPCB) recycling may result in the recovery of potentially precious materials and the reuse of some components, it is a challenging task because its composition diversity requires a cautious pre-processing stage to achieve optimal recycling outcomes. Our research focused on proposing a method to evaluate the economic feasibility of recycling integrated circuits (ICs) from WPCB. The proposed method can help decide whether to dismantle a separate WPCB before the physical or mechanical recycling process and consists of estimating the IC area from a WPCB, calculating the IC’s weight using surface density, and estimating how much metal can be recovered by recycling those ICs. To estimate the IC area in a WPCB, we used a state-of-the-art object detection deep learning model (YOLO) and the PCB DSLR image dataset to detect the WPCB’s ICs. Regarding IC detection, the best result was obtained with the partitioned analysis of each image through a sliding window, thus creating new images of smaller dimensions, reaching 86.77% mAP. As a final result, we estimate that the Deep PCB Dataset has a total of 1079.18 g of ICs, from which it would be possible to recover at least 909.94 g of metals and silicon elements from all WPCBs’ ICs. Since there is a high variability in the compositions of WPCBs, it is possible to calculate the gross income for each WPCB and use it as a decision criterion for the type of pre-processing.

Three Dimensional Detection of the via in the PCB CT Image Using Morphology Operation

2015 ◽  
Vol 752-753 ◽  
pp. 1406-1412
Author(s):  
Lei Zeng ◽  
Jian Chen ◽  
Han Ning Li ◽  
Bin Yan ◽  
Yi Fu Xu ◽  
...  
Keyword(s):  
Nondestructive Testing ◽  
Printed Circuit Board ◽  
Three Dimensional ◽  
Detection Algorithm ◽  
Circuit Board ◽  
Dimensional Structure ◽  
Three Dimension ◽  
Shape Information ◽  
Printed Circuit ◽  
Testing Technology

In modern industry, the nondestructive testing of printed circuit board (PCB) can prevent effectively the system failure and is becoming more and more important. As a vital part of the PCB, the via connects the devices, the components and the wires and plays a very important role for the connection of the circuits. With the development of testing technology, the nondestructive testing of the via extends from two dimension to three dimension in recent years. This paper proposes a three dimensional detection algorithm using morphology method to test the via. The proposed algorithm takes full advantage of the three dimensional structure and shape information of the via. We have used the proposed method to detect via from PCB images with different size and quality, and found the detection performances to be very encouraging.

scholarly journals A Study on the Radiated Susceptibility of Printed Circuit Boards and the Effects of Via Fencing

Electronics ◽  
2021 ◽  
Vol 10 (5) ◽  
pp. 539
Author(s):  
Ryan P. Tortorich ◽  
William Morell ◽  
Elizabeth Reiner ◽  
William Bouillon ◽  
Jin-Woo Choi
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Ground Plane ◽  
Circuit Board ◽  
Electronic Systems ◽  
Coupling Mechanism ◽  
Electromagnetic Modeling ◽  
Printed Circuit ◽  
Edge Radiation ◽  
Area Of Concern

Because modern electronic systems are likely to be exposed to high intensity radiated fields (HIRF) environments, there is growing interest in understanding how electronic systems are affected by such environments. Backdoor coupling in particular is an area of concern for all electronics, but there is limited understanding about the mechanisms behind backdoor coupling. In this work, we present a study on printed circuit board (PCB) backdoor coupling and the effects of via fencing. Existing work focuses on ideal stackups and indicates that edge radiation is significantly reduced by via fencing. In this study, both full wave electromagnetic modeling and experimental verification are used to investigate both ideal and practical PCB stackups. In the ideal scenario, we find that via fencing substantially reduces coupling, which is consistent with prior work on emissions. In the practical scenario, we incorporate component footprints and traces which naturally introduce openings in the top ground plane. Both simulation and experimental data indicate that via fencing in the practical scenario does not substantially mitigate coupling, suggesting that PCB edge coupling is not the dominant coupling mechanism, even at varying angles of incidence and polarization.

Hierarchical pyramidal subsampling in deep convolutional networks for visual pattern recognition

2021 ◽  
Author(s):  
A. E. Averyanikhin ◽  
A. I. Vlasov ◽  
E. V. Evdokimova
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Flaw Detection ◽  
Input Image ◽  
Circuit Board ◽  
Digital Data ◽  
Deep Convolutional Neural Networks ◽  
Size Scale ◽  
Printed Circuit ◽  
Convolutional Networks

The main problem of known deep convolutional neural networks (CNN) is that they require a fixed-size input image. This requirement is “artificial” and can reduce recognition accuracy for images or its parts of arbitrary size/scale. The paper proposes a strategy of combining “hierarchical pyramidal subselection” to eliminate the above restriction. The structure of the neural network using the proposed combining strategy allows the generation of prediction regardless of the size/scale of the original image, and also improves the accuracy of recognition. Features of application of CNN for identification and recognition of defects of conducting pattern of printed circuit board blanks have been considered. Features of defects of conductive pattern of printed circuit board blanks have been briefly discussed. The invention proposes the use of artificial CNN, which have advantages in speed and accuracy in solving problems of object recognition on images relative to existing methods. The focus is on the architecture of CNN using hierarchical pyramidal subselection. Capabilities of application of CNN for recognition of defects of conducting pattern of printed circuit board blanks have been shown. Proposed method of hierarchical pyramidal subselection in deep convolutional networks has been implemented in software complex, which allows processing digital data of photographs of conducting pattern of printed circuit boards, in particular during their flaw detection, and can be used for localization of existing defects of conducting pattern. The conclusion draws the possibilities of using methods and means of image processing in flaw detection of radio-electronic equipment and instruments

scholarly journals Optimization Studies on Recovery of Metals from Printed Circuit Board Waste

2018 ◽  
Vol 2018 ◽  
pp. 1-10 ◽  
Author(s):  
P. Sivakumar ◽  
D. Prabhakaran ◽  
M. Thirumarimurugan
Keyword(s):  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Lead Nitrate ◽  
Acid Leaching ◽  
Circuit Board ◽  
Copper Recovery ◽  
Printed Circuit ◽  
Waste Printed Circuit Boards ◽  
Electrode Combination ◽  
Lead Metal

The aim of the study was to recover copper and lead metal from waste printed circuit boards (PCBs). The electrowinning method is found to be an effective recycling process to recover copper and lead metal from printed circuit board wastes. In order to simplify the process with affordable equipment, a simple ammonical leaching operation method was adopted. The selected PCBs were incinerated into fine ash powder at 500°C for 1 hour in the pyrolysis reactor. Then, the fine ash powder was subjected to acid-leaching process to recover the metals with varying conditions like acid-base concentration, electrode combination, and leaching time. The relative electrolysis solution of 0.1 M lead nitrate for lead and 0.1 M copper sulphate for copper was used to extract metals from PCBs at room temperature. The amount of lead and copper extracted from the process was determined by an atomic absorption spectrophotometer, and results found were 73.29% and 82.17%, respectively. Further, the optimum conditions for the recovery of metals were determined by using RSM software. The results showed that the percentage of lead and copper recovery were 78.25% and 89.1% should be 4 hrs 10 A/dm2.

Analysis of surface insulation resistance related failures in electronics by circuit simulation

Circuit World ◽  
2017 ◽  
Vol 43 (2) ◽  
pp. 45-55 ◽  
Author(s):  
Vadimas Verdingovas ◽  
Salil Joshy ◽  
Morten Stendahl Jellesen ◽  
Rajan Ambat
Keyword(s):  
Printed Circuit Board ◽  
Electronic Device ◽  
Early Stage ◽  
Circuit Simulation ◽  
Circuit Board ◽  
Insulation Resistance ◽  
Electronic Circuits ◽  
Content Type ◽  
Printed Circuit ◽  
Surface Insulation Resistance

Purpose The purpose of this study is to show that the humidity levels for surface insulation resistance (SIR)-related failures are dependent on the type of activators used in no-clean flux systems and to demonstrate the possibility of simulating the effects of humidity and contamination on printed circuit board components and sensitive parts if typical SIR data connected to a particular climatic condition are available. This is shown on representative components and typical circuits. Design/methodology/approach A range of SIR values obtained on SIR patterns with 1,476 squares was used as input data for the circuit analysis. The SIR data were compared to the surface resistance values observable on a real device printed circuit board assembly. SIR issues at the component and circuit levels were analysed on the basis of parasitic circuit effects owing to the formation of a water layer as an electrical conduction medium. Findings This paper provides a summary of the effects of contamination with various weak organic acids representing the active components in no-clean solder flux residue, and demonstrates the effect of humidity and contamination on the possible malfunctions and errors in electronic circuits. The effect of contamination and humidity is expressed as drift from the nominal resistance values of the resistors, self-discharge of the capacitors and the errors in the circuits due to parasitic leakage currents (reduction of SIR). Practical/implications The methodology of the analysis of the circuits using a range of empirical leakage resistance values combined with the knowledge of the humidity and contamination profile of the electronics can be used for the robust design of a device, which is also important for electronic products relying on low current consumption for long battery lifetime. Originality/value Examples provide a basic link between the combined effect of humidity and contamination and the performance of electronic circuits. The methodology shown provides the possibility of addressing the climatic reliability of an electronic device at the early stage of device design by using typical SIR data representing the possible climate exposure.

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