scholarly journals Comparator combines analog-logic function

1971 ◽  
Vol 3 (2) ◽  
pp. 114-114
Author(s):  
Lloyd J. Frei
Keyword(s):  
Logic Function ◽  
Analog Logic

scholarly journals Static Switching Dynamic Buffer Circuit

2013 ◽  
Vol 2013 ◽  
pp. 1-11
Author(s):  
A. K. Pandey ◽  
R. A. Mishra ◽  
R. K. Nagaria
Keyword(s):  
Power Consumption ◽  
Power Supply ◽  
Loading Condition ◽  
Cmos Technology ◽  
Clock Frequency ◽  
Logic Function ◽  
Output Node ◽  
Switching Dynamic ◽  
Power Delay Product ◽  
Frequency Temperature

We proposed footless domino logic buffer circuit. It minimizes redundant switching at the dynamic and the output nodes. The proposed circuit avoids propagation of precharge pulse to the output node and allows the dynamic node which saves power consumption. Simulation is done using 0.18 µm CMOS technology. We have calculated the power consumption, delay, and power delay product of the proposed circuit and compared the results with the existing circuits for different logic function, loading condition, clock frequency, temperature, and power supply. Our proposed circuit reduces power consumption and power delay product as compared to the existing circuits.

Logic function demonstrations of 4JC-SQUID-based gates

1997 ◽  
Vol 5 (7-12) ◽  
pp. 327-332
Author(s):  
F Furuta ◽  
E Oya ◽  
S Matsumoto ◽  
H Akaike ◽  
A Fujimaki ◽  
...  
Keyword(s):  
Logic Function

scholarly journals EXPLORATION OF STYLIZED FACTS IN THE ARTIFICIAL LIFE SYSTEM AVIDA

2016 ◽  
Vol 4 ◽  
pp. 791-795
Author(s):  
Shinta Koyano ◽  
Lukáš Pichl
Keyword(s):  
Population Dynamics ◽  
Power Law ◽  
Artificial Life ◽  
Real Life ◽  
Central Processing Unit ◽  
Processing Unit ◽  
Full Width ◽  
Logic Function ◽  
Central Processing ◽  
Clique Graph

Population dynamics in the evolution, extinction, and re-evolution of various logic-function performing organisms is studied in the artificial life system, Avida. Following the work of Yedid (2009), we design an experiment involving two extinction regimes, pulse-extinction (corresponding to a random-kill event) and press-extinction (corresponding to a prolonged episode of rare resources). In addition, we study the effect of environmental topology (toroidal grid and clique graph). In the study of population dynamics, logarithmic returns are generally applied. The resulting distributions display a fat tail form of the power law: the more complex the logic function (in terms of NAND components), the broader the full width at half a maximum of the histogram. The power law exponents were in sound agreement with those of “real-life” populations and distributions. The distributions of evolutionary times, as well as post-extinction recovery periods, were very broad, and presumably had no standard deviations. Using 100 runs of 200,000 updates for each of the four cases (about 1 month of central processing unit time), we established the dynamics of the average population, with the effect of world topology.

Realization of XNOR logic function with all-optical high contrast XOR and NOT gates

2018 ◽  
Vol 26 (1) ◽  
pp. 63-72 ◽  
Author(s):  
E.H. Shaik ◽  
N. Rangaswamy
Keyword(s):  
High Contrast ◽  
Logic Function ◽  
All Optical

logic function

2000 ◽  
pp. 926-926
Author(s):  
Martin H. Weik
Keyword(s):  
Logic Function

A Novel ALU Circuit based on Reversible Logic

2019 ◽  
Vol 29 (11) ◽  
pp. 2050172
Author(s):  
Arindam Banerjee ◽  
Debesh Kumar Das
Keyword(s):  
Cost Reduction ◽  
Delay Line ◽  
Reversible Logic ◽  
Quantum Cost ◽  
Logic Function ◽  
Fabrication Cost

We propose a new ALU circuit based on reversible logic. The ALU circuit implements two addition methodologies. The outputs are generated at some fixed lines for each arithmetic or logic function. A satisfactory tradeoff is achieved between the line count and the quantum cost. Reduction in ancillary inputs and garbage outputs causes a decrease in fabrication cost. The proposed designs outperform the earlier designs with respect to delay, line count and number of operations. The libraries NOT–CNOT–V–[Formula: see text] are used to optimize the quantum cost of the proposed designs.

Programmable Logic Gates Based on Tunable Multistable Mechanisms

2019 ◽  
Author(s):  
Mohamed Zanaty ◽  
Hubert Schneegans ◽  
Ilan Vardi ◽  
Simon Henein
Keyword(s):  
Logic Gate ◽  
Logic Gates ◽  
Building Blocks ◽  
Programmable Logic ◽  
Logic Device ◽  
Logic Function ◽  
Element Analysis ◽  
Stability Behavior ◽  
Binary Logic ◽  
Logical Operations

Abstract Binary logic operations are the building blocks of computing machines. In this paper, we present a new programmable binary logic gate based on programmable multistable mechanisms (PMM), which are multistable structures whose stability behavior depends on modifiable boundary conditions as defined and analyzed in our previous work. The logical state of a PMM is defined by its stability and logical operations are implemented by modifying the stability behavior of the mechanism. Our programmable logic device has two qualitatively different sets of inputs. The first set determines the logic function to be computed. The second set represents the logical inputs. The output is a single logical value, “true” if the mechanism changes state and “false” otherwise. In this way, we are able to mechanically implement a set of binary logical operations. This implementation is validated using an analytical model characterizing the qualitative stability behavior of the mechanism. This was further verified using finite element analysis and experimental demonstration.

Lightweight flexible indium-free oxide TFTs with AND logic function employing chitosan biopolymer as self-supporting layer

2019 ◽  
Vol 153 ◽  
pp. 16-22 ◽  
Author(s):  
Guangdi Feng ◽  
Yuhang Zhao ◽  
Jie Jiang
Keyword(s):  
Logic Function ◽  
Supporting Layer ◽  
Chitosan Biopolymer ◽  
Oxide Tfts
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