Extraction of Defect in Doping Silicon Wafer by Analyzing the Lifetime Profile Method

2008 ◽  
Vol 55-57 ◽  
pp. 765-768
Author(s):  
W. Pengchan ◽  
T. Phetchakul ◽  
Amporn Poyai
Keyword(s):  
Leakage Current ◽  
Current Density ◽  
Cmos Technology ◽  
In Doping ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Total Leakage ◽  
Implantation Process ◽  
Generation Lifetime ◽  
Key Parameter

The total leakage current in silicon p-n junction diodes compatible with 0.8 µm CMOS technology is investigated. The generation lifetime is a key parameter for the leakage current, which can be obtained from the current-voltage (I-V) and the capacitance-voltage (C-V) characteristics. As will be shown, the electrically active defect from ion implantation process generated in p-n junction can be extracted from the generation current density.

Improved Extraction of the Local Carrier Generation Lifetime from Forward Diode Characteristics

2011 ◽  
Vol 378-379 ◽  
pp. 593-596 ◽  
Author(s):  
W. Pengchan ◽  
Toempong Phetchakul ◽  
Amporn Poyai
Keyword(s):  
Current Density ◽  
Cmos Technology ◽  
Carrier Generation ◽  
Recombination Lifetime ◽  
Forward Current ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Recombination Current ◽  
Generation Lifetime ◽  
Local Generation

This paper is proposed to extract the local carrier generation lifetime from forward current-voltage (I-V) characteristics of p-n junctions in case of non-uniform defects. The different geometry p-n junctions have been fabricated by a standard CMOS technology. The forward I-V and high frequency capacitance-voltage (C-V) characteristics of p-n junctions have been measured. The recombination current density can be extracted from the area forward current density by subtracting with the area diffusion current density. Form the recombination current density, the local generation and recombination lifetime can be obtained.

Improving Sensitivity of p-n Junction Temperature Sensor by Carrier Lifetime Modification

2008 ◽  
Vol 55-57 ◽  
pp. 517-520
Author(s):  
Amporn Poyai ◽  
E. Ratanaudomphisut ◽  
J. Supadech ◽  
N. Klunngien ◽  
C. Hruanan ◽  
...  
Keyword(s):  
Leakage Current ◽  
Temperature Sensor ◽  
Carrier Lifetime ◽  
Reverse Current ◽  
Junction Temperature ◽  
Carrier Generation ◽  
Current Voltage ◽  
Generation Lifetime

This paper presents the relation between the staring cobalt thickness with carrier generation lifetime, which effects to the sensitivity of p-n junction temperature sensor. The starting cobalt thickness of 12, 20 and 30nm have been used. The carrier generation lifetimes have been calculated from the reverse current-voltage (I-V) characteristics. The highest carrier generation lifetime has been obtained in the case of 12nm starting cobalt thickness. The highest sensitivity of p-n junction temperature sensor has also been observed from the case of 12nm starting cobalt thickness. The sensitivity has been calculated from the relation between leakage current versus temperature. The sensitivity of p-n junction temperature sensor can be improved by increasing carrier generation lifetime.

Carrier Lifetime of Platinum Doped P-N Diode after Irradiation by Soft X-Ray

2013 ◽  
Vol 717 ◽  
pp. 117-120
Author(s):  
Budsara Nararug ◽  
Itsara Srithanachai ◽  
Surada Ueamanapong ◽  
Sanya Khunkhao ◽  
Supakorn Janprapha ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Leakage Current ◽  
Carrier Lifetime ◽  
X Ray ◽  
Current Voltage ◽  
Capacitance Voltage

This paper analyzes the effect of X-ray irradiation on the electrical properties of Pt-doped p-n diode. X-ray energy irradiated on Pt-doped P-N diode with 70 keV with time 205 sec. After irradiations, the current-voltage (I-V) characteristics and capacitance-voltage (C-V) characteristics and carrier degeneration lifetime (τg) were investigated. The results show that the leakage current is slightly increased after the diodes were exposed X-ray and affect higher degeneration carrier lifetime. The effects after X-ray irradiation indicated that the defects of the diode have been changed.

Electrical Characterization of Copper Penetration Effects in the Gate Oxide of MOS Devices

2001 ◽  
Vol 714 ◽  
Author(s):  
François Mondon ◽  
Jacques Cluzel ◽  
Denis Blachier ◽  
Yves Morand ◽  
Laurent Martel ◽  
...  
Keyword(s):  
Leakage Current ◽  
Electrical Characterization ◽  
Current Increase ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Thermal Oxide ◽  
Current Voltage ◽  
Bias Temperature Stress ◽  
Generation Lifetime

ABSTRACTCopper penetration in thermal oxide was investigated using MOS capacitors by annealing at 450 °C and bias-temperature stress at 250 °C. Copper induces minority carrier generation lifetime decay and oxide leakage current increase. Degradation is enhanced by capacitor biasing, which confirms the role of Cu+ ions. The current-voltage characteristics are consistent with Poole-Frenkel model, showing that electron transport proceeds through traps created in the oxide bulk by copper. When a negative bias is applied, copper traps are removed from oxide near SiO2-Si interface and the leakage current is cancelled but the generation lifetime remains nil, copper contamination of silicon surface being not removed.None of these effects are observed when the copper gate is separated from oxide by a 10 nm TiN layer, proving that this material is an efficient barrier against copper diffusion at 450°C.

Evaluating Oxide Liner and Copper Barrier Integrity of Through-Silicon-Via by Electrical Characterization and Microanalysis

2013 ◽  
Vol 1559 ◽  
Author(s):  
Minrui Yu ◽  
Bharat Bhushan ◽  
Niranjan Kumar ◽  
Mun Kyu Park ◽  
John Hua ◽  
...  
Keyword(s):  
Leakage Current ◽  
Performance Enhancement ◽  
Electrical Characterization ◽  
Power Reduction ◽  
3D Integration ◽  
Through Silicon Via ◽  
Barrier Integrity ◽  
Current Voltage ◽  
Model Predictions ◽  
Capacitance Voltage

ABSTRACT3D integration enabled by through-silicon-via (TSV) allows continued performance enhancement and power reduction for semiconductor devices, even without further scaling. For TSV wafers with all Applied Materials unit processes, we evaluate the integrity of oxide liner and copper barrier by capacitance-voltage (C-V) and current-voltage (I-V) measurements, from which oxide capacitance, minimum TSV capacitance, and leakage current are extracted. The capacitance values match well with model predictions. The leakage data also demonstrate good wafer-scale uniformity. The liner and barrier quality are further verified with microanalysis techniques.

Yield Analysis Based on the Defect Analysis with Derivative Method

2015 ◽  
Vol 781 ◽  
pp. 160-163 ◽  
Author(s):  
Warakorn Praepattharapisut ◽  
Weera Pengchan ◽  
Toempong Phetchakul ◽  
Amporn Poyai
Keyword(s):  
Silicon Wafer ◽  
Calculated Data ◽  
Cmos Technology ◽  
Defect Analysis ◽  
Yield Analysis ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Derivative Method ◽  
Actual Yield ◽  
Characteristic Measurement

This paper presented the corresponding between the yield equation prediction from Poisson, Murphy with wafer actual yield on the silicon wafer with 0.8 μm CMOS technology. The defect analysis with derivative method, current - voltage and capacitance-voltage of diode characteristic measurement, is used to define the defect in p-n junction on silicon wafer. The different sampling numbers of chips are used to calculate the yield. Finally the calculated data and actual would be compared and found that at sampling number is 25, the tolerance from actual yield is less than 3%.

Defects Study by Activation Energy Profile for Lowering Leakage Current in P-N Junction

2011 ◽  
Vol 695 ◽  
pp. 569-572 ◽  
Author(s):  
Itsara Srithanachai ◽  
Surada Ueamanapong ◽  
Poopol Rujanapich ◽  
Narin Atiwongsangthong ◽  
Surasak Niemcharoen ◽  
...  
Keyword(s):  
Activation Energy ◽  
Leakage Current ◽  
Volume Diffusion ◽  
Defect Density ◽  
Arrhenius Plot ◽  
Temperature Dependent ◽  
Residual Defect ◽  
Current Voltage ◽  
Depletion Width ◽  
Capacitance Voltage

Diode leakage current consists of diffusion (Id) and generation current (Ig), which is strongly sensitive to the residual defect density. These defects can be studied by activation energy (Ea). Therefore, this paper presents a method for calculating activation energy of silicon p-n junctions from volume generation current. It combines temperature-dependent current–voltage (I –V) and capacitance–voltage (C-V) measurements of diodes. The Igcan be found from the volume leakage current by subtraction of the volume diffusion current, which is calculated while the depletion width is zero. The activation energy (Ea) is derived from slope of an Arrhenius plot of Ig. To derive the correct slope the temperature dependence of the depletion width, which is obtained from the corrected volume capacitance has been applied. The Ea profile below junction has been shown. The lower Ea value has been found near the junction, which may relate to the junction implantation.

Electron Transfer at the n-InP | Poly(Pyrrole) Interface

1997 ◽  
Vol 488 ◽  
Author(s):  
Mark C. Lonergan ◽  
Christopher T. Cooney ◽  
James A. Myers
Keyword(s):  
Barrier Height ◽  
Current Density ◽  
Exchange Current ◽  
Exchange Current Density ◽  
Surface Recombination Velocity ◽  
Equilibrium Exchange ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Inorganic Semiconductor ◽  
Metal Interfaces

AbstractMeasurements of the barrier height by capacitance-voltage techniques and of the equilibrium exchange current density by current-voltage techniques are performed on the rectifying interface between n-InP and poly(pyrrole) (chemically polymerized and characterized by an electrochemical potential of ≈0.2V vs. SCE). The current-voltage data yielded a quality factor of 1.2±0.1 and an equilibrium exchange current density of (1.2±0.6) x 10−9. A cm−2. The capacitance-voltage data yielded a barrier height of 0.73 ± 0.02 V and measured dopant densities within 15% of the expected value. These data, taken together, are inconsistent with thermionic emission theories developed to describe inorganic semiconductor I metal interfaces and often applied to inorganic semiconductor I doped conjugated polymer interfaces. In particular, the ratio of the rate constant for majority carrier electron capture (surface recombination velocity) at the n-InP | poly(pyrrole) interface to that at n-InP | metal interfaces is found to be (6 ± 5) × 10−3.

Electrical and Structural Properties of SrTiO3 Thin Films Deposited by Plasma-enhanced Metalorganic Chemical Vapor Deposition

1997 ◽  
Vol 12 (4) ◽  
pp. 1160-1164 ◽  
Author(s):  
Nam-Kyeong Kim ◽  
Soon-Gil Yoon ◽  
Won-Jae Lee ◽  
Ho-Gi Kim
Keyword(s):  
Thin Films ◽  
Dielectric Constant ◽  
Electric Field ◽  
Leakage Current ◽  
Leakage Current Density ◽  
Current Density ◽  
Chemical Vapor ◽  
Dissipation Factor ◽  
Si Substrates ◽  
Capacitance Voltage

The microstructure and electrical properties were investigated for SrTiO3(STO) thin films deposited on Pt/Ti/SiO2/Si substrates by PEMOCVD. The SrF2 phase existing in the STO films deposited at 450 °C influences the dielectric constant, dissipation factor, and leakage current density of STO films. The dielectric constant and dissipation factor of STO films deposited at 500 °C were 210 and 0.018 at 100 kHz, respectively. STO films were found to have paraelectric properties from the capacitance-voltage characteristics. Leakage current density of STO films at 500 °C was about 1.0 × 10-8 A/cm2 at an electric field of 70 kV/cm. The leakage current behaviors of STO films deposited at 500 and 550 °C were controlled by Schottky emission with applied electric field.

Light Wavelength Effects on Performance of a-Si:H PIN Photodiodes

2012 ◽  
Vol 1426 ◽  
pp. 199-204
Author(s):  
Shu-Hsien Wu ◽  
Yue Kuo ◽  
Chi-Chou Lin
Keyword(s):  
Leakage Current ◽  
Charge Storage ◽  
Light Illumination ◽  
Illumination Condition ◽  
Voltage Range ◽  
Voltage Curve ◽  
Current Voltage ◽  
Capacitance Voltage ◽  
Short Wavelength Light ◽  
Wavelength Light

ABSTRACTLight effects on the performance of the a-Si:H PIN photodiode has been studied. The leakage current-voltage and capacitance-voltage curves under the red, green and blue light illuminations were measured. The apparent charge storage density in the negative voltage range was quantified from the capacitance-voltage curve; charges in the positive voltage range were estimated from the leakage current-voltage curve. A comparison of charge storage capacities of diodes with different intrinsic layer thicknesses is also presented. The diode under the long wavelength light illumination condition stored more charges than that under the short wavelength light illumination condition because the former could penetrate the intrinsic a-Si:H layer deeper than the latter could. The leakage current and charge storage capacity of the diode are determined by the generation of electron-hole pairs, the depletion of charges in the intrinsic layer, and the supply of charges from the electrodes. The number of incident photons is critical to the process.

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