The Realization of Portable Ultrasonic TOFD Imaging and Detecting System

2013 ◽  
Vol 798-799 ◽  
pp. 651-655
Author(s):  
Si Yuan Wang ◽  
Xing Qun Zhao ◽  
Ling Xia

This paper introduced the design of a portable ultrasonic TOFD imaging and detecting system, and developed the hardware and application software based on embedded system. We accomplished multi-channel ultrasonic transmission and acquisition, real time A-scan signal or TOFD image display, ultrasonic data storage and analysis of large capacity and automatic quantitative calculation of cracks in this system. This system offered rapid speed and high accuracy that could be used to locate and size cracks in both weld joint detection and field structure examination.

2007 ◽  
Vol 353-358 ◽  
pp. 2632-2635
Author(s):  
Pei Yu Li ◽  
Da Peng Tan ◽  
Tao Qing Zhou ◽  
Bo Yu Lin

Aiming at some problems in the fields of industry monitoring technology (IMT) such as bad dynamic ability and poor versatility, this paper brought forward a kind of intelligent Status monitoring and Fault diagnosis Network System (SFNS) based on UPnP-Universal Plug and Play. The model for fault diagnosis network system was established according to characteristics and requirements of IMT network, and system network architecture was designed and realized by UPnP. Using embedded system technology, real-time data collection node, monitoring center node and data storage server were designed, and that supplies powerful real-time data support for SFNS. Industry fields experiments proved that this system can realize self recognition, seamless linkage and other self adapting ability, and can break through the limitation of real IP address to achieve real-time remote monitoring on line.


2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Juan Fang ◽  
Qiangang Zheng ◽  
Haibo Zhang ◽  
Chongwen Jin

Abstract Aero-engine on-board steady state model is an important part of many advanced engine control algorithms. In order to build a high accuracy and real-time steady-state onboard model in a large envelope, an ICPSM (improved compact propulsion system model) based on batch normalize neural network is proposed in this paper. Compared with piecewise linearization model and support vector machine model, conventional CPSM which is mainly composed of baseline model and nonlinear sub model has the advantages of high real-time performance and small data storage. However, as the similarity conversion error increases with the distance from the design point, the cumulative error of the conventional baseline model also increases, which makes the model unable to maintain high accuracy in the full envelope. Thus, a high accuracy baseline model in full envelope based on batch normalize neural network is proposed in this paper. The simulation result shows that compared with the conventional compact propulsion system model, the percentage error of parameters of the improved compact propulsion system model based on the batch neural network is reduced by two times, the single step operation time is reduced by 18%, and the data storage of the onboard model is reduced as well.


Author(s):  
Jia Hua-Ping ◽  
Zhao Jun-Long ◽  
Liu Jun

Cardiovascular disease is one of the major diseases that threaten the human health. But the existing electrocardiograph (ECG) monitoring system has many limitations in practical application. In order to monitor ECG in real time, a portable ECG monitoring system based on the Android platform is developed to meet the needs of the public. The system uses BMD101 ECG chip to collect and process ECG signals in the Android system, where data storage and waveform display of ECG data can be realized. The Bluetooth HC-07 module is used for ECG data transmission. The abnormal ECG can be judged by P wave, QRS bandwidth, and RR interval. If abnormal ECG is found, an early warning mechanism will be activated to locate the user’s location in real time and send preset short messages, so that the user can get timely treatment, avoiding dangerous occurrence. The monitoring system is convenient and portable, which brings great convenie to the life of ordinary cardiovascular users.


Author(s):  
Reshma P ◽  
Muneer VK ◽  
Muhammed Ilyas P

Face recognition is a challenging task for the researches. It is very useful for personal verification and recognition and also it is very difficult to implement due to all different situation that a human face can be found. This system makes use of the face recognition approach for the computerized attendance marking of students or employees in the room environment without lectures intervention or the employee. This system is very efficient and requires very less maintenance compared to the traditional methods. Among existing methods PCA is the most efficient technique. In this project Holistic based approach is adapted. The system is implemented using MATLAB and provides high accuracy.


Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.


2021 ◽  
Vol 11 (11) ◽  
pp. 4758
Author(s):  
Ana Malta ◽  
Mateus Mendes ◽  
Torres Farinha

Maintenance professionals and other technical staff regularly need to learn to identify new parts in car engines and other equipment. The present work proposes a model of a task assistant based on a deep learning neural network. A YOLOv5 network is used for recognizing some of the constituent parts of an automobile. A dataset of car engine images was created and eight car parts were marked in the images. Then, the neural network was trained to detect each part. The results show that YOLOv5s is able to successfully detect the parts in real time video streams, with high accuracy, thus being useful as an aid to train professionals learning to deal with new equipment using augmented reality. The architecture of an object recognition system using augmented reality glasses is also designed.


2021 ◽  
Vol 11 (11) ◽  
pp. 4940
Author(s):  
Jinsoo Kim ◽  
Jeongho Cho

The field of research related to video data has difficulty in extracting not only spatial but also temporal features and human action recognition (HAR) is a representative field of research that applies convolutional neural network (CNN) to video data. The performance for action recognition has improved, but owing to the complexity of the model, some still limitations to operation in real-time persist. Therefore, a lightweight CNN-based single-stream HAR model that can operate in real-time is proposed. The proposed model extracts spatial feature maps by applying CNN to the images that develop the video and uses the frame change rate of sequential images as time information. Spatial feature maps are weighted-averaged by frame change, transformed into spatiotemporal features, and input into multilayer perceptrons, which have a relatively lower complexity than other HAR models; thus, our method has high utility in a single embedded system connected to CCTV. The results of evaluating action recognition accuracy and data processing speed through challenging action recognition benchmark UCF-101 showed higher action recognition accuracy than the HAR model using long short-term memory with a small amount of video frames and confirmed the real-time operational possibility through fast data processing speed. In addition, the performance of the proposed weighted mean-based HAR model was verified by testing it in Jetson NANO to confirm the possibility of using it in low-cost GPU-based embedded systems.


Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.


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