A 2nd-Order PWM Pre-Emphasis Technique and its Experimental FPGA Implementation
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In this paper, a Pulse-Width Modulation (PWM) pre-emphasis technique is extended to a2nd-order version to equalize a higher-order transfer function of an interconnection inside/betweenVLSI chips. The PWM pre-emphasis method does not change the pulse amplitude as for conventionalFIR pre-emphasis, but instead exploits timing resolution. As a proof of concept, a 2nd-order timedomainpre-emphasis technique is designed and implemented using an FPGA to demonstrate thecapability of compensating for deterioration of signals caused by interconnections with higher-ordertransfer functions.
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2012 ◽
Vol 132
(1)
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pp. 1-9
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2020 ◽
Vol 8
(1)
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pp. 16
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