Latest SiC Epitaxial Layer Growth Results in a High-Throughput 6×150 mm Warm-Wall Planetary Reactor

2014 ◽  
Vol 778-780 ◽  
pp. 113-116 ◽  
Author(s):  
Albert A. Burk ◽  
D. Tsvetkov ◽  
Michael J. O'Loughlin ◽  
S. Ustin ◽  
L. Garrett ◽  
...  
Keyword(s):  
Epitaxial Layer ◽  
Unit Area ◽  
Layer Growth ◽  
Epitaxial Layers ◽  
Market Penetration ◽  
Temperature Uniformity ◽  
Cycle Times ◽  
The Cost ◽  
Defect Densities ◽  
Initial Results

Latest results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Increased growth rates of 30-40 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. Increased quantities of 150-mm epitaxial wafers now allow statistical analysis of their epitaxial layer properties. Specular epitaxial layer morphology was obtained, with morphological defect densities <0.4 cm-2, consistent with projected 5x5 mm die yields averaging 93% for Si-face epitaxial layers between 10 and 30 microns thick. Intrawafer thickness and doping uniformity are good, averaging 1.7% and 5.1% respectively. Wafer-to-wafer doping variation has also been significantly reduced from ~12 [5] to <3% s/mean. Initial results for C-face growths show excellent morphology (97%) but poor doping uniformity (~16%). Wafer shape is relatively unchanged by epitaxial growth consistent with good epitaxial temperature uniformity.

SiC Epitaxial Layer Growth in a 6x150 mm Warm-Wall Planetary Reactor

2012 ◽  
Vol 717-720 ◽  
pp. 75-80 ◽  
Author(s):  
Albert A. Burk ◽  
Denis Tsvetkov ◽  
Dan Barnhardt ◽  
Michael J. O'Loughlin ◽  
Lara Garrett ◽  
...  
Keyword(s):  
Epitaxial Layer ◽  
Layer Growth ◽  
Thickness Variation ◽  
Market Penetration ◽  
Cycle Times ◽  
Wafer Thickness ◽  
Background Doping ◽  
Reactor Temperature ◽  
The Cost ◽  
Defect Densities

Initial results are presented for SiC-epitaxial growths employing a novel 6x150-mm/10x100-mm Warm-Wall Planetary Vapor-Phase Epitaxial (VPE) Reactor. The increased areal throughput offered by this reactor and 150-mm diameter wafers, is intended to reduce the cost per unit area for SiC epitaxial layers, increasing the market penetration of already successful commercial SiC Schottky and MOSFET devices [1]. Growth rates of 20 micron/hr and short <2 hr fixed-cycle times (including rapid heat-up and cool-down ramps), while maintaining desirable epitaxial layer quality were achieved. No significant change in 150 mm diameter wafer shape is observed upon epitaxial growth consistent with good-quality, low-stress substrates and low (<5°C) cross-wafer epitaxial reactor temperature variation. Specular epitaxial layer morphology was obtained, with morphological defect densities consistent with projected 5x5 mm die yields as high as 80% and surface roughness, Ra, of 0.3 nm. Intrawafer thickness uniformity is good, averaging only 1.6% and within a run wafer-to-wafer thickness variation is 2.7%. N-type background doping densities less that 1E14 cm-3 have been measured by CV. Doping uniformity and wafer-to-wafer variation currently average ~12% requiring further improvement. The first 100 m thick 150-mm diameter epitaxial growths are reported.

SiC Warm-Wall Planetary VPE Growth on Multiple 100-mm Diameter Wafers

2006 ◽  
Vol 527-529 ◽  
pp. 159-162 ◽  
Author(s):  
Albert A. Burk ◽  
Michael J. O'Loughlin ◽  
Michael J. Paisley ◽  
Adrian R. Powell ◽  
M.F. Brady ◽  
...  
Keyword(s):  
Layer Thickness ◽  
Epitaxial Layer ◽  
High Throughput ◽  
Layer Growth ◽  
Experimental Results ◽  
Epitaxial Layers ◽  
Large Area ◽  
Low Background ◽  
Total Range ◽  
Background Doping

Experimental results are presented for SiC epitaxial layer growth employing a large-area, up to 8x100-mm, warm-wall planetary SiC-VPE reactor. This high-throughput reactor has been optimized for the growth of uniform 0.01 to 80-micron thick, specular, device-quality SiC epitaxial layers with low background doping concentrations of <1x1014 cm-3 and intentional p- and n-type doping from ~1x1015 cm-3 to >1x1019 cm-3. Intrawafer layer thickness and n-type doping uniformity (σ/mean) of ~2% and ~8% have been achieved to date in the 8x100-mm configuration. The total range of the average intrawafer thickness and doping within a run are approximately ±1% and ±6% respectively.

Optimisation of Epitaxial Layer Growth by Schottky Diodes Electrical Characterization

2006 ◽  
Vol 527-529 ◽  
pp. 199-202 ◽  
Author(s):  
Francesco La Via ◽  
G. Galvagno ◽  
A. Firrincieli ◽  
Fabrizio Roccaforte ◽  
Salvatore di Franco ◽  
...  
Keyword(s):  
Epitaxial Layer ◽  
Growth Parameters ◽  
Schottky Diodes ◽  
Electrical Characterization ◽  
Maximum Growth ◽  
Deposition Process ◽  
Maximum Growth Rate ◽  
Layer Growth ◽  
Epitaxial Layers ◽  
Dilution Ratio

The influence of the epitaxial layer growth parameters on the electrical characteristics of Schottky diodes has been studied in detail. Several diodes were manufactured on different epitaxial layers grown with different Si/H2 ratio and hence with different growth rates. From the electrical characterization a maximum silicon dilution ratio can be fixed at 0.04 %. This limit fixes also a maximum growth rate that can be obtained in the epitaxial growth, with this process, at about 8 μm/h. Several epitaxial layers have been grown, using this dilution ratio, with different temperatures (1550÷1650 °C). At 1600 °C the best compromise between the direct and the reverse characteristics has been found. With this process the yield decreases from 90% for a Schottky diode area of 0.25 mm2 to 61% for the 2 mm2 diodes. Optimizing the deposition process to reduce the defects introduced by the epitaxial process, yield of the order of 80% can be reached on 1 mm2 diodes.

Optimisation of Epitaxial Layer Growth with HCl Addition by Optical and Electrical Characterization

2007 ◽  
Vol 556-557 ◽  
pp. 137-140 ◽  
Author(s):  
Lucia Calcagno ◽  
Gaetano Izzo ◽  
Grazia Litrico ◽  
G. Galvagno ◽  
A. Firrincieli ◽  
...  
Keyword(s):  
Epitaxial Layer ◽  
Growth Process ◽  
Electrical Characterization ◽  
High Growth ◽  
High Growth Rate ◽  
Layer Growth ◽  
Epitaxial Layers ◽  
Electrical Measurements ◽  
Deposition Chamber ◽  
Order Of Magnitude

High growth rate of 4H-SiC epitaxial layers can be reached with the introduction of HCl in the deposition chamber. The effect of the Cl/Si ratio on this epitaxial growth process has been studied by optical and electrical measurements. Optical microscopy shows an improvement of the surface morphology and luminescence measurements reveal a decrease of epitaxial layer defects with increasing the Cl/Si ratio in the range 0.05–2.0. The leakage current measured on the diodes realized on these wafers is reduced of an order of magnitude and DLTS measurements show a decrease of the EH6,7 level concentration in the same range of Cl/Si ratio. The value Cl/Si=2.0 allows to grow epitaxial layers with the lowest defect concentration.

Growth of 150 mm 4H-SiC Epitaxial Layer by a Hot-Wall Reactor

2018 ◽  
Vol 924 ◽  
pp. 76-79
Author(s):  
Yong Qiang Sun ◽  
Gan Feng ◽  
Jun Yong Kang ◽  
Wei Ning Qian ◽  
Yi Yang Li ◽  
...  
Keyword(s):  
Statistical Analysis ◽  
Epitaxial Growth ◽  
Epitaxial Layer ◽  
Mass Production ◽  
Doping Concentration ◽  
Large Diameter ◽  
Layer Growth ◽  
Epitaxial Layers

In this work we report the latest epitaxial growth of 150 mm 4H-SiC on 4° off-axis substrates by a commercial hot-wall reactor. A statistical analysis of more than 300 runs with an epi thickness range of 6μm~15μm shows that the average uniformities of the thickness and the doping concentration are 1.34% (sigma/mean) and 3.90% (sigma/mean), respectively, and the average 2 mm x 2 mm projected device yield is 97.79%. The growths of ~60 μm-thick 150 mm 4H-SiC epitaxial layers have also been carried out. The repeatability of this system for thick epitaxial layer growth has been verified, showing a run-to-run uniformity similar to that of the thin wafers. These results of 150 mm 4H-SiC epitaxial growths indicate that this comercial hot-wall reactor has the potential for mass production of large diameter 4H-SiC epitaxial wafers.

scholarly journals Modeling Epitaxial Layer Growth from Gas Phase for Analysis of Influence of Changing Technological Process with Variation in Growth Zone Heating

2021 ◽  
Vol 0 (0) ◽  
Author(s):  
E. L. Pankratov
Keyword(s):  
Heat Transfer ◽  
Gas Phase ◽  
Technological Process ◽  
Epitaxial Layer ◽  
Analytical Approach ◽  
Growth Zone ◽  
Layer Growth ◽  
Nonstationary Heat ◽  
Epitaxial Layers ◽  
Nonstationary Heat Transfer

Abstract In this paper, we analyze the nonstationary heat transfer during growth of epitaxial layers in epitaxy reactors from the gas phase. Based on this analysis, we formulate several recommendations on organization of heating of the growth zone for increasing homogeneity of epitaxial layers. We introduce an analytical approach for analysis of heat transfer during the growth of epitaxial layers from the gas phase. The approach gives a possibility to simultaneously take into account the nonlinearity of heat transfer, as well as changes of their parameters both in space and time.

New SiC Epitaxial Growth Process with up to 100% BPD to TED Defect Conversion on 150mm Hot-Wall CVD Reactor

2019 ◽  
Vol 963 ◽  
pp. 123-126
Author(s):  
Tobias Höchbauer ◽  
Christian Heidorn ◽  
Nikolaos Tsavdaris
Keyword(s):  
Epitaxial Growth ◽  
Epitaxial Layer ◽  
Basal Plane ◽  
Growth Process ◽  
High Growth ◽  
High Growth Rate ◽  
Layer Growth ◽  
Structural Defects ◽  
Epitaxial Layers ◽  
Basal Plane Dislocation

The future challenges for SiC device technology are cost reduction and increased reliability. A key point to achieve that is the increase of yield during epitaxial layer growth through the reduction of structural defects (such as basal plane dislocations and triangle defects), an increased thickness and doping uniformity, and a high growth rate. Despite significant advancements in SiC epitaxial growth technology, it still constitutes a big challenge to find the optimum working point at which all those requirements are fulfilled. By implementing a new epitaxial layer growth process, we are able to grow basal plane dislocation free epitaxial layers, while the density of other structural defects remains low. Additionally, intra-wafer thickness and doping uniformities of the epitaxial layers are further improved.

SiC-4H Epitaxial Layer Growth Using Trichlorosilane (TCS) as Silicon Precursor

2006 ◽  
Vol 527-529 ◽  
pp. 179-182 ◽  
Author(s):  
Stefano Leone ◽  
Marco Mauceri ◽  
Giuseppe Pistone ◽  
Giuseppe Abbondanza ◽  
F. Portuese ◽  
...  
Keyword(s):  
Growth Rate ◽  
Surface Roughness ◽  
Epitaxial Layer ◽  
Growth Rates ◽  
High Growth ◽  
Droplet Formation ◽  
Layer Growth ◽  
Crystal Quality ◽  
Epitaxial Layers ◽  
Carbon Precursor

4H-SiC epitaxial layers have been grown using trichlorosilane (TCS) as the silicon precursor source together with ethylene as the carbon precursor source. A higher C/Si ratio is necessary compared with the silane/ethylene system. This ratio has to be reduced especially at higher Si/H2 ratio because the step-bunching effect occurs. From the comparison with the process that uses silane as the silicon precursor, a 15% higher growth rate has been found using TCS (trichlorosilane) at the same Si/H2 ratio. Furthermore, in the TCS process, the presence of chlorine, that reduces the possibility of silicon droplet formation, allows to use a high Si/H2 ratio and then to reach high growth rates (16 *m/h). The obtained results on the growth rates, the surface roughness and the crystal quality are very promising.

Effects of Epitaxial Layer Growth Parameters on the Defect Density and on the Electrical Characteristics of Schottky Diodes

2005 ◽  
Vol 483-485 ◽  
pp. 429-432 ◽  
Author(s):  
Francesco La Via ◽  
Fabrizio Roccaforte ◽  
Salvatore di Franco ◽  
Alfonso Ruggiero ◽  
L. Neri ◽  
...  
Keyword(s):  
Growth Rate ◽  
Leakage Current ◽  
Epitaxial Layer ◽  
Defect Density ◽  
Growth Parameters ◽  
Schottky Diodes ◽  
Layer Growth ◽  
Epitaxial Layers ◽  
Low Leakage ◽  
Low Leakage Current

The effects of the Si/H2 ratio on the growth of the epitaxial layer and on the epitaxial defects was studied in detail. A large increase of the growth rate has been observed with the increase of the silicon flux in the CVD reactor. Close to a Si/H2 ratio of 0.05 % silicon nucleation in the gas phase occurs producing a great amount of silicon particles that precipitate on the wafers. The epitaxial layers grown with a Si/H2 ratio of 0.03% show a low defect density and a low leakage current of the Schottky diodes realized on these wafers. For these diodes the DLTS spectra show thepresence of several peaks at 0.14, 0.75, 1.36 and 1.43 eV. For epitaxial layers grown with higher values of the Si/H2 ratio and then with an higher growth rate, the leakage current of the Schottky diodes increases considerably.

SiC Epitaxial Layers Grown by Sublimation Method and their Electrical Properties

2007 ◽  
Vol 556-557 ◽  
pp. 153-156
Author(s):  
Chi Kwon Park ◽  
Gi Sub Lee ◽  
Ju Young Lee ◽  
Myung Ok Kyun ◽  
Won Jae Lee ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Epitaxial Layer ◽  
Light Emission ◽  
Epitaxial Layers ◽  
Current Voltage ◽  
Space Technique ◽  
Sublimation Method ◽  
Device Applications ◽  
P Type ◽  
Surface Morphologies

A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. In this study, we aimed to systematically investigate surface morphologies and electrical properties of SiC epitaxial layers grown with varying a SiC/Al ratio in a SiC source powder during the sublimation growth using the CST method. It was confirmed that the acceptor concentration of epitaxial layer was continuously decreased with increasing the SiC/Al ratio. The blue light emission was successfully observed on a PN diode structure fabricated with the p-type SiC epitaxial layer. Furthermore, 4H-SiC MESFETs having a micron-gate length were fabricated using a lithography process and their current-voltage performances were characterized.

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