Laser Direct Patterning of Dry Etch BCB Adhesive Layers for Low Temperature Permanent Wafer-to-Wafer Bonding

2016 ◽  
Vol 2016 (DPC) ◽  
pp. 001222-001254
Author(s):  
Kai Zoschke ◽  
J.-U. Kim ◽  
M. Wegner ◽  
M. Gallagher ◽  
R. Barr ◽  
...  

To enable advanced wafer level packaging approaches for devices like MEMS, image sensors or optical elements, wafer-to-wafer bonding processes using structured low temperature curable adhesives are required. A lot of Benzocyclobutene (BCB)-based wafer bonding works have been reported in the past showing a broad range of applications and good performance, but also some limitations such as long bond cycles and high cure temperature of 250 °C. In 2013 new process concepts were demonstrated [1], showing that wafer bond cycle time can be reduced to less than 10 min and a post bond batch cure at temperatures below 200 °C can be used to significantly shrink the overall cost of a BCB-based adhesive wafer bonding process. In order to create a patterned BCB bond layer, photo structuring of CYCLOTENE ® 4000 Resin is one solution. However, due to the decreased flow capability of that material after exposure, high bond forces and extended bonding times during wafer bonding as well as nearly flat surfaces with low topography are required for void-free bonding. To overcome these limitations, an increased material flow capability during wafer bonding is required. In this context non-photo sensitive CYCLOTENE ® 3000 Resin is suitable, since it has excellent flow capability in non-cured state. However, non-cured CYCLOTENE ® 3000 Resin cannot be structured with standard dry etching processes using a photo resist layer as mask. In order to enable patterned adhesive bonding based on CYCLOTENE ® 3000 Resin, alternative structuring methods have to be evaluated. One method was presented in [1] which is transfer printing of CYCLOTENE ® 3000 Resin from a help wafer to topography features of the device wafer. Although very good results were obtained, the method is restricted to applications with significant topography to enable the transfer printing. In this work we focus on a new structuring method for non-cured BCB layers formed from CYCLOTENE ® 3000 Resin. The layers were spin coated, baked and subsequently patterned using a 248 nm excimer laser stepper. The system features a 2.5× mask projection with a resulting exposure field of 6.5 × 6.5 mm2 and allows a direct ablation patterning of polymers. By using this method bond frame structures were patterned into 5 μm thick BCB layers at 200 mm silicon wafers. The wafers with the structured adhesive were bonded at 80 °C and 0.2 MPa for 5 minutes with 200 mm glass wafers. The bonded wafer stacks were subsequently post bond batch cured at 190 °C. Wafer dicing and shear tests of the bonded structures revealed excellent mechanical robustness of the BCB bond frames. The paper will review the new BCB wafer bond processes for supporting short cycle times with special focus on the new patterning approach by laser ablation. Process flow description as well as systematical analysis of pattern reproducibility of the new structuring method is part of the discussion.

2016 ◽  
Vol 75 (9) ◽  
pp. 345-353 ◽  
Author(s):  
F. Kurz ◽  
T. Plach ◽  
J. Suss ◽  
T. Wagenleitner ◽  
D. Zinner ◽  
...  

2012 ◽  
Vol 2012 (DPC) ◽  
pp. 1-24
Author(s):  
Michael Gallagher ◽  
Jong-Uk Kim ◽  
Eric Huenger ◽  
Kai Zoschke ◽  
Christina Lopper ◽  
...  

3D stacking, one of the 3D integration technologies using through silicon vias (TSVs), is considered as a desirable 3D solution due to its cost effectiveness and matured technical background. For successful 3D stacking, precisely controlled bonding of the two substrates is necessary, so that various methods and materials have been developed over the last decade. Wafer bonding using polymeric adhesives has advantages. Surface roughness, which is critical in direct bonding and metal-to-metal bonding, is not a significant issue, as the organic adhesive can smooth out the unevenness during bonding process. Moreover, bonding of good quality can be obtained using relatively low bonding pressure and low bonding temperature. Benzocyclobutene (BCB) polymers have been commonly used as bonding adhesives due to their relatively low curing temperature (~250 °C), very low water uptake (<0.2%), excellent planarizing capability, and good affinity to Cu metal lines. In this study, we present wafer bonding with BCB at various conditions. In particular, bonding experiments are performed at low temperature range (180 °C ~ 210 °C), which results in partially cured state. In order to examine the effectiveness of the low temperature process, the mechanical (adhesion) strength and dimensional changes are measured after bonding, and compared with the values of the fully cured state. Two different BCB polymers, dry-etch type and photo type, are examined. Dry etch BCB is proper for full-area bonding, as it has low degree of cure and therefore less viscosity. Photo-BCB has advantages when a pattern (frame or via open) is to be structured on the film, since it is photoimageable (negative tone), and its moderate viscosity enables the film to sustain the patterns during the wafer bonding process. The effect of edge beads at the wafer rim area and the soft cure (before bonding) conditions on the bonding quality are also studied. Alan/Rey ok move from Flip Chip and Wafer Level Packaging 1-6-12.


2005 ◽  
Vol 127 (1) ◽  
pp. 7-11 ◽  
Author(s):  
A. Polyakov ◽  
M. Bartek ◽  
J. N. Burghartz

This paper reports on an area-selective adhesive wafer bonding, using photosensitive BCB from Dow Co. The strength of the fabricated bonds is characterized using the wedge-opening and tensile methods. The measured fracture toughness is 53.5±3.9J/m2 with tensile strength up to 71 MPa. The potential application of BCB bonding is demonstrated on a concept of wafer-level chip-scale package for RF applications and microfilter array for microfluidic applications.


2011 ◽  
Vol 2011 (DPC) ◽  
pp. 000836-000858 ◽  
Author(s):  
Sang Hwui Lee ◽  
Michael Khbeis

This paper reports on a successful 3D integration (3DI) of multi-purpose signal processor (MSP) chips with memory chips using die-to-wafer (D2W) and wafer-to-wafer (W2W) bonding technologies. 3D integration enables compact systems of commercial-off-the-shelf (COTS) parts with high functionality using a wafer-level process for better thinning process uniformity and high yield throughput. The3D system is comprised of commercial Flash memory bare die and MSP bare die. The bare die are face-down aligned to a 150mm diameter silicon handle wafer with alignment marks polished silicon surface. Unique features on the commercial die are detected and used for die registration using a flip-chip bonder with vision automation. An adhesive film between the die and silicon handle wafer are used for temporary bonding. After the die-to-wafer population and bonding, the die substrates are thinned at the wafer-level to a target of 60 microns for the memory die and 25 microns for the MSP die, respectively. The thinned memory die set is permanently transferred onto a 150mm diameter silicon carrier wafer using a low temperature silicon covalent wafer bonding. Following bonding, an adhesive film release process is used to separate the memory die set from the temporary handle wafer. The thinned MSP die on a second handle wafer are then aligned to the thinned memory die set using a wafer-to-wafer alignment tool, and bonded with thin-film polyimide in a high-yield, low temperature wafer bonding process, followed by the release process to separate the MSP die set from the handle wafer. Finally, the MSP/memory stack are electrically connected using a via-last through-silicon-via (TSV) process. One of the key considerations for COTS 3DI is to meet the back-end-of-line (BEOL) thermal budgets of 350–400 Celsius. Plasma-assisted preparation facilitates the reduction in thermal budget for silicon covalent bonding and is performed at 150 Celsius, followed by a long-term annealing process at 175 Celsius. Stacking of thinned die relies on low temperature polyimide bonding that is performed at 200 Celsius. Fluorine and oxygen based plasma surface activation process and CTE-matched polyimide bonding play a critical role in enabling the low temperature bonding for this 3D MSP/memory integration. The thinning and bonding processing details that are presented in this paper are essential for COTS 3DI but can also be applied to several low-profile multi-chip module and packaging applications.


2008 ◽  
Vol 2008 ◽  
pp. 1-17 ◽  
Author(s):  
Hyundai Park ◽  
Alexander W. Fang ◽  
Di Liang ◽  
Ying-Hao Kuo ◽  
Hsu-Hao Chang ◽  
...  

This paper reviews the recent progress of hybrid silicon evanescent devices. The hybrid silicon evanescent device structure consists of III-V epitaxial layers transferred to silicon waveguides through a low-temperature wafer bonding process to achieve optical gain, absorption, and modulation efficiently on a silicon photonics platform. The low-temperature wafer bonding process enables fusion of two different material systems without degradation of material quality and is scalable to wafer-level bonding. Lasers, amplifiers, photodetectors, and modulators have been demonstrated with this hybrid structure and integration of these individual components for improved optical functionality is also presented. This approach provides a unique way to build photonic active devices on silicon and should allow application of silicon photonic integrated circuits to optical telecommunication and optical interconnects.


Author(s):  
James Lee ◽  
Tony Rogers

A novel wafer level packaging method suitable for low production volumes, R&D, and multi-project wafers is presented, providing a hermetic seal suitable for vacuum encapsulation with wafers bonded at a low temperature. Hermetic through-wafer interconnects are bump bonded to a CMOS chip encapsulated by bonding a cap wafer after activating surfaces with free radicals, the Silicon-Silicon direct bond is then annealed to a high strength at 200°C to avoid chip damage. The application for which this system is proposed is an implantable multi-contact active nerve electrode for the treatment of epilepsy via vagus nerve stimulation. Although intended for human implantation of integrated systems, this technology may be applied across a range of devices requiring hermetic or vacuum sealing and through-wafer interconnection. Solid electroplated through-wafer interconnects (aspect ratio 5) enable hermetic interconnection of direct bonded packages with low connection impedance, offering benefits across a range of packaging applications. A key feature of this packaging method is it’s versatility, the proposed embodiment features chip to wafer bonding with an ASIC, but the package is equally suitable for MEMS devices and also for wafer to wafer bonding.


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