Embedded SIP Modules for next-GEN Heterogeneous “POWER-Devices”

2019 ◽  
Vol 2019 (DPC) ◽  
pp. 000383-000407
Author(s):  
Kevin Moody ◽  
Nick Stukan
Keyword(s):  
Supply Chain ◽  
Business Models ◽  
High Reliability ◽  
Semiconductor Industry ◽  
Thermal Dissipation ◽  
System Level ◽  
Electrical Performance ◽  
Power Devices ◽  
Embedded Technology ◽  
New Device

In this paper will focus on the comprehension of System-in-Package (SiP) with embedded active and passive components integration will be described. Embedding of semiconductor chips into substrates provides many advantages that have been noted. It allows the smallest package form-factor with high degree of miniaturization through sequentially stacking of multiple layers containing embedded devices that are optimized for electrical performance with short and geometrically well controlled copper interconnects. In addition, the embedding gives a homogeneous mechanical environment of the chips, resulting in good reliability at system level. Furthermore, embedded technology is an excellent resolution to Power management challenges dealing with new device technologies (Si, GaS, GaN) and optimization on the thermal dissipation with improved efficiency. Embedded technology comes with many challenges in 2019, primarily design for manufacturability (DFM) and maturity. Customers are looking for better-performance capability and pricing normally that means same or lower than die free package cost (DFPC) comparison. This paper will discuss the challenges bring to market the Embedded SIP Modules for next-GEN Heterogeneous “POWER-Devices” Today, the embedded process is being developed by printed circuit board (PCB) manufacturers creating a new supply chain, bringing new players into the semiconductor industry. This new supply chain comes along with new business models. As a result of the increasing interest in implementing embedding technologies, ACCESS Semiconductors in China is committed to be a leader in the adaptation of embedding technologies, with over 10-yrs mature coreless technology and proved design rules for low profile dimensions with seamless Ti/Cu sputtering and Cu pillar interconnect giving advantages in both electrical & power performance. ACCESS Patented “Via-in-Frame” technology provides High Reliability (MSL1, PCT, BHAST) at Cost Effective in high panel utilization for HVM, using standard substrate/PCB known material sets, no need for wafer bumping/RDL, over-mold or under-fill cost adders. ACCESS Semiconductors is currently in HVM on single die 2L, and LVM on multi-devices actives/passives 4L SiP construction both platforms are driven from the power market segment. In-development on Die Last & Frameless (MeSiP) platforms utilizing hybrid technology (mSAP) and Photo Imageable Dielectric (PID) materials for cost down solutions in HVM by Q1FY2020. Also, ACCESS Semiconductors total turn-key solutions will include front-of-line (FOL) and end-of-line (EOL) capability from wafer handling, back-grinding, and dicing with KGD traceability thru the embedded chip process, frame/strip singulation, FT, marking pack & ship providing additional 30% cost reduction in the future. Here's an illustration of Embedded Technology Roadmap and Product Platforms.

3D Technology Applications Market Trends & Key Challenges

2014 ◽  
Vol 2014 (DPC) ◽  
pp. 000363-000400
Author(s):  
Thibault Buisson ◽  
Amandine Pizzagalli ◽  
Eric Mounier ◽  
Rozalia Beica
Keyword(s):  
Supply Chain ◽  
Business Models ◽  
Semiconductor Industry ◽  
High Volume ◽  
Advanced Technology ◽  
Passive Component ◽  
Process Technology ◽  
3D Integration ◽  
3D Technology ◽  
Major Player

Semiconductor industry, for more than four decades, has rigorously followed Moore's Law in scaling down the CMOS technologies. Although several new materials and processes are being developed to address the challenges of future technology nodes, in the coming years they will be limited with respect to functionalities that future devices will require. As a consequence a clear trend of moving from CMOS to package and system architecture can be observed. Three-dimensional (3D) technology using the well-known Through Silicon Via (TSV) interconnect is one the emerging option, considered today the most advanced technology, that could enable various heterogeneous integration. Indeed such technology is not limited to the CMOS scaling in itself, it is rather based on bringing more functionalities by stacking different type of devices (Logic, Memory, Analog, MEMS, Passive component...) while reducing the form factor of the packaging. This functional diversification is also known as More-than-Moore. In addition, considering Known Good Die approach, each component of the 3D package could have a different manufacturer using different wafer sizes and node technology, thus bringing more complexity but also more opportunities and responsibilities to the supply chain. There are several business models identified, either using vertical integration or collaborative approach, if a dominant one will emerge or several tactics will co-exist, it is still remains a key question that need to be answered. The supply chain interaction and key players will be addressed in this presentation, including current and future standardization needs. This is today a key for the manufacturing of advanced 3D devices. 3D integration is considered today a new paradigm for the semiconductor industry, since it will drive evolution for packages for the coming decades. Due to several advantages that TSV technology can bring, several platforms have started. 3D WLCSP, 2.5D interposers & 3DIC are the main platforms that will be studied in this paper. Market forecasts in terms of wafer starts, market revenue, segments and end-products as well as supply chain activities and major player interactions will be presented. The industry has enthusiastically been waiting for mass production of 3D ICs. Although some small level of production has already been reported, the adoption rate in high volume manufacturing (HVM) is still low due to unresolved challenges that the industry still needs to address. Process technology is not fully mature, there are still many challenges in bonding and de-bonding, testing as well as thermal management that have to be overcome. Furthermore, design tools have to be fully released to enable proper 3D integration design. Looking at the time to market it is foreseen that device such as the Hybrid Memory Cube, combining high-speed logic with a multiple stacks of TSV bonded memories, will come into high volume production in 2014. This will definitely change the world of the memory market and will significantly speed up the adoption of 3D technologies. Technology roadmaps for 3D integration will also be included in the manuscript and reviewed during the presentation.

E-commerce logistics in supply chain management

2017 ◽  
Vol 117 (10) ◽  
pp. 2263-2286 ◽  
Author(s):  
Ying Yu ◽  
Xin Wang ◽  
Ray Y. Zhong ◽  
G.Q. Huang
Keyword(s):  
Supply Chain ◽  
Supply Chain Management ◽  
Business Models ◽  
Big Data Analytics ◽  
System Level ◽  
Asia Pacific ◽  
Furniture Industry ◽  
Chain Management ◽  
Content Type ◽  
New Business

Purpose The purpose of this paper is to present the state-of-the-art E-commerce logistics in supply chain management by investigating worldwide implementations and corresponding models together with supporting techniques via furniture industry. Design/methodology/approach Typical E-commerce logistics companies from North America, Europe, and Asia Pacific are comprehensively investigated so as to get the lessons and insights from these practices. Findings Future technologies like Internet of Things, Big Data Analytics, and Cloud Computing would be possibly adopted to enhance the E-commerce logistics in terms of system level, operational level, and decision-making level that may be real time and intelligent in the next decade. Research limitations/implications This paper takes the furniture industry for example to illustrate the E-commerce logistics and supply chain management (LSCM). Other industries like electronic appliance industry are not considered. Practical implications Opportunities and future perspectives are summarized from practical implementations so that interested parties like E-commerce and logistics companies are able to get some guidance when they are contemplating the business. Social implications E-commerce is booming with the development of new business models and will be continuously boosted in the near future. With large number of enterprises carrying out E-commerce, logistics has been largely influenced. Originality/value Insights and lessons from this paper are significant for academia and practitioners for considering E-commerce LSCM.

Thermal Interface Materials and Cooling Technologies in Microelectronic Packaging—A Critical Review

2018 ◽  
Vol 15 (2) ◽  
pp. 63-74
Author(s):  
Dinesh P. R. Thanu ◽  
Boxi Liu ◽  
Marco Aurelio Cartas
Keyword(s):  
Integrated Circuit ◽  
Semiconductor Industry ◽  
Thermal Dissipation ◽  
System Level ◽  
Thermal Interface Materials ◽  
Thermal Interface ◽  
Field Programmable ◽  
Increasing Demand ◽  
And Performance ◽  
Interface Materials

The ever increasing demand for fast computing has led to heterogeneous integration of packages as can be seen in the latest Xeon family segments in the market. Microprocessors are now adjacent to memory chips, transceivers, field-programmable gate arrays, and even other microprocessors within a single substrate. These complex designs have instigated an increase in cooling demand for microprocessors, and hence, there has been an increased focus within the semiconductor industry on developing advance thermal solutions. From the packaging level, thermal interface materials (TIMs) play a key role in thermally connecting various components within the package and helps reduce the thermal resistance between the die surfaces and integrated heat spreaders. From the system level, cooling technology is critical to attain the desired overall thermal dissipation and performance. In this review, progress made in the area of TIMs and system cooling solutions are presented. The focus is on the evolution of TIMs and cooling technologies and their challenges in the integrated circuit packaging. Merits and demerits of various TIM materials available in the commercial market are also discussed. The article will be concluded with some directions for the future that would be potentially very beneficial.

Embedded solutions: Fan-out and Embedded Die Packages market and technology trends

2015 ◽  
Vol 2015 (1) ◽  
pp. 000235-000238
Author(s):  
Jérôme Azémar
Keyword(s):  
Supply Chain ◽  
Business Models ◽  
Low Cost ◽  
High Volume ◽  
Added Value ◽  
System Level ◽  
Wafer Level ◽  
High Expectations ◽  
Interesting Approach ◽  
Pcb Manufacturing

Embedded packages are nowadays not anymore just an interesting approach for some specific application. Benefiting from 3D TSV high cost, and consequently delays, these packages could fit the high expectations of the industry. Indeed, added value of embedded packages in terms of integration, reliability and even cost at system level is already clear for manufacturers. Embedded packages lacked success until 2013–2014 because of long time of qualification, few players involved and customer convincing time. The situation changed with new product announcements and strong involvement of some key players. In this presentation we will focus on two main types of embedded packages, those that are most of interest at the moment: Fan-Out and Embedded Dies packages. The principle of Fan Out technology is to embed products in a molded compound and allow redistribution layers pitch to be independent from die size. This approach is already mature enough to have high volume products claimed by Nanium and Stats ChipPAC using eWLB type of Fan-Out. Market for Fan-Out packages in 2014 almost reached $200M and a 20% growth for the coming years is expected. Understanding the potential of that market and the high demand from telecom industry for a thin and cheap package, other important OSATs like SPIL or J-Devices are willing to enter the market with their own technologies. TSMC is also proposing its inFO process to its customers, confirming that foundries could look at the OSATs reserved market through wafer-level packages. Each player has its own view on how to gain market share and meet the challenges such as cost reduction, panel manufacturing, yield improvement, die shift… The principle of Embedded die packages has the same purpose of promoting high integration due to placing chips within the substrate but with a different approach: Embedding is done in laminate substrates. This process is pushed by PCB manufacturers such as AT&S and could create a new supply chain with new players. One of the main advantages is to use a mature and cheap manufacturing chain created for PCB manufacturing and then having low cost for a technology that would allow a good integration and access to both sides of the chips easily. On the other hand, Embedded Die technologies are still waiting for a high volume project that shall be coming once higher yield, better resolution and clarification of the supply chain will be achieved. In this presentation we will describe what the strategies to reach that goal are. Both technologies seem to be competing but are actually complementary and often targeting different markets. Key customers already qualified them and will open the gates for the fast growing packaging market. The presentation will provide an overview of the products announcements, commercialization roadmaps as well as market forecasts per application. Insights and trends into the different fan-out and embedded die packaging approaches by applications, business models and major players will be reviewed.

scholarly journals HISTORICAL, ENTREPRENEURIAL AND SUPPLY CHAIN MANAGEMENT PERSPECTIVES ON THE SEMICONDUCTOR INDUSTRY

2010 ◽  
Vol 07 (01) ◽  
pp. 1-18 ◽  
Author(s):  
WILLIAM Y. JIANG ◽  
XIAOHONG QUAN ◽  
SHU ZHOU
Keyword(s):  
Supply Chain ◽  
Supply Chain Management ◽  
Business Models ◽  
Semiconductor Industry ◽  
Silicon Valley ◽  
Chain Management ◽  
Intel Corporation ◽  
Evolution And Development ◽  
National Semiconductor ◽  
Integrated Device

This paper studies the semiconductor industry from three perspectives: historical, entrepreneurial and supply chain management. After a brief introduction, the paper begins by tracing the history and evolution of the semiconductor industry including the two seminal enterprises: Shockley Semiconductor Laboratory and Fairchild Semiconductor. Starting from the invention of the transfer resistor (transistor) by three Nobel laureates (John Bardeen, Walter Houser Brattain and William Shockley) and the founding of the "most successful failure" in Silicon Valley, Shockley Semiconductor Laboratory and the Fairchild Eight, the paper discusses some earliest entrepreneurial attempts in the industry and how these attempts influenced over seventy semiconductor companies in Silicon Valley, including Intel Corporation, National Semiconductor and Advanced Micro Devices. The paper then examines the industry's developing business models, from the vertically integrated model to the integrated device manufacturing model to the development of the foundry model. Finally, the paper looks at the industry's growing trend of globalization together with its outsourcing/off-shoring and supply chain management developments. The authors believe that such a multi-disciplinary approach to study an industry provides valuable insights into the evolution and development of an entire industry and the approach can be generalized to study other industries to enhance understanding at the industry level.

Embedded solutions: Fan-out and Embedded Dies Packages market and technology trends

2015 ◽  
Vol 2015 (DPC) ◽  
pp. 000182-000216 ◽  
Author(s):  
Jerome AZEMAR ◽  
Rozalia BEICA ◽  
Thibault BUISSON ◽  
Andrej IVANCOVIC ◽  
Amandine PIZZAGALLI
Keyword(s):  
Supply Chain ◽  
Business Models ◽  
Low Cost ◽  
High Volume ◽  
Added Value ◽  
System Level ◽  
Wafer Level ◽  
High Expectations ◽  
Interesting Approach ◽  
Pcb Manufacturing

Embedded packages are nowadays not anymore just an interesting approach for some specific application. Benefiting from 3D TSV high cost, and consequently delays, these packages could fit the high expectations of the industry. Indeed, added value of embedded packages in terms of integration, reliability and even cost at system level is already clear for manufacturers. Embedded packages lacked success until 2013–2014 because of long time of qualification, few players involved and customer convincing time. The situation changed with new product announcements and strong involvement of some key players. In this presentation we will focus on two main types of embedded packages, those that are most of interest at the moment: Fan-Out and Embedded Dies packages. The principle of Fan Out technology is to embed products in a molded compound and allow redistribution layers pitch to be independent from die size. This approach is already mature enough to have high volume products claimed by Nanium and Stats ChipPAC using eWLB type of Fan-Out. Market for Fan-Out packages in 2014 almost reached $200M and a 20% growth for the coming years is expected. Understanding the potential of that market and the high demand from telecom industry for a thin and cheap package, other important OSATs like SPIL or J-Devices are willing to enter the market with their own technologies. TSMC is also proposing its inFO process to its customers, confirming that foundries could look at the OSATs reserved market through wafer-level packages. Each player has its own view on how to gain market share and meet the challenges such as cost reduction, panel manufacturing, yield improvement, die shift… The principle of Embedded dies package has the same purpose of promoting high integration due to placing chips within the substrate but with a different approach: Embedding is done in laminate substrates. This process is pushed by PCB manufacturers such as AT&S and could create a new supply chain with new players. One of the main advantages is to use a mature and cheap manufacturing chain created for PCB manufacturing and then having low cost for a technology that would allow a good integration and access to both sides of the chips easily. On the other hand, Embedded Die technologies are still waiting for a high volume project that shall be coming once higher yield, better resolution and clarification of the supply chain will be achieved. In this presentation we will describe what the strategies to reach that goal are. Both technologies seem to be competing but are actually complementary and often targeting different markets. Key customers already qualified them and will open the gates for the fast growing packaging market. The presentation will provide an overview of the products announcements, commercialization roadmaps as well as market forecasts per application. Insights and trends into the different fan-out and embedded die packaging approaches by applications, business models and major players will be reviewed.

Fan-Out Wafer-Level-Packaging: Market and Technology Trends

2016 ◽  
Vol 2016 (1) ◽  
pp. 000176-000179 ◽  
Author(s):  
Jérôme Azémar
Keyword(s):  
Cost Reduction ◽  
Flip Chip ◽  
Business Models ◽  
Semiconductor Industry ◽  
Cost Benefit ◽  
High Volume ◽  
Added Value ◽  
System Level ◽  
Wafer Level ◽  
High Expectations

Abstract The semiconductor industry is facing a new era in which device scaling and cost reduction will not continue on the path they followed for the past few decades, with Moore's law in its foundation. Advanced nodes do not bring the desired cost benefit anymore and R&D investments in new lithography solutions and devices below 10nm nodes are rising substantially. In order to answer market demands, the industry seeks further performance and functionality boosts in integration. While scaling options remain uncertain in the shorter term and continue to be investigated, the spotlight turns to advanced packages. Emerging packages such as fan-out wafer level packages and 2.5D/3D IC solutions together with more conventional but upgraded flip chip BGAs aim to bridge the gap and revive the cost/performance curve while at the same time adding more functionality through integration. Embedded packages are nowadays not anymore just an interesting approach for specific applications. Benefiting from 3D TSV high cost, these packages could fit the high expectations of the industry. Indeed, added value of embedded packages in terms of integration, reliability and even cost at system level is already clear for manufacturers. Embedded packages lacked success until 2013–2014 because of long time of qualification, few players involved and customer convincing time. The situation changed with new product announcements and strong involvement of some key players, lately most notably TSMC. In this work we will focus on one main type of embedded package of most interest at the moment: Fan-Out wafer level package. The principle of Fan-Out technology is to embed products in a mold compound and allow redistribution layer pitch to be independent from die size. This approach is already mature enough to have high volume products claimed by Nanium and JCET/Stats ChipPAC using eWLB type of Fan-Out, with many other developments from OSATs and an aggressive technology from TSMC (inFO). The market for Fan-Out packages in 2015 almost reached $500M, with potential breakthrough events in store in 2016 that could triple the 2015 market and continue further with more than 30% growth. Understanding the potential of that market and the high demand from telecom industry for a thin and cheap package, other important OSATs like Powertech or Amkor are willing to enter the market with their own technologies. TSMC is also proposing its inFO process to its customers, confirming that foundries could look at the OSATs reserved market through wafer-level packages. Each player has its own view on how to gain market share and meet the challenges such as cost reduction, panel manufacturing, yield improvement, die shift… The presentation will provide an overview of the products announcements, commercialization roadmaps as well as market forecasts per application. Insights and trends into the different fan-out packaging approaches by applications, business models and major players will be reviewed.

scholarly journals Joint Innovation Investment and Pricing Decisions in Retail Supply Chains with Customer Value

2021 ◽  
Vol 13 (3) ◽  
pp. 1309
Author(s):  
Jiali Qu ◽  
Benyong Hu ◽  
Chao Meng
Keyword(s):  
Supply Chain ◽  
Cooperative Game ◽  
Customer Value ◽  
Business Models ◽  
Value Added ◽  
Revenue Sharing ◽  
Nash Bargaining ◽  
Product Price ◽  
Pricing Decisions ◽  
Game Equilibrium

In the retail industry, customer value has become the key to maintaining competitive advantages. In the era of new retail, customer value is not only affected by the product price, but it is also closely related to innovations, such as value-added services and unique business models. In this paper, we study the joint innovation investment and pricing decisions in a retailer–supplier supply chain based on revenue sharing contracts and customer value. We first find that, in the non-cooperative game, equilibrium only exists in the supplier Stackelberg game. However, revenue sharing contracts cannot coordinate the supply chain in the non-cooperative game. By considering supply chain members’ bargaining power, we find that there exists a unique equilibrium for the Nash bargaining product. In addition, revenue sharing contracts can coordinate the supply chain and achieve the optimal consumer surplus. When the supply chain is coordinated, supply chain profit is allocated to the supply chain members based on their bargaining powers.

scholarly journals Supply Chain Management Open Innovation: Virtual Integration in the Network Logistics System

2021 ◽  
Vol 7 (1) ◽  
pp. 54
Author(s):  
Vladimir Shcherbakov ◽  
Galina Silkina
Keyword(s):  
Supply Chain ◽  
Supply Chain Management ◽  
Supply Chains ◽  
System Integration ◽  
Business Models ◽  
Industrial Revolution ◽  
Linear Models ◽  
Logistics System ◽  
Chain Management ◽  
Economic Relations

The customer-oriented approach is actively developing within the global trend of the modern industrial revolution that is Industry 4.0. The focus on customer interests has led to cooperation and integration in supply chains, improving their efficiency and increasing transparency, awareness, and trust. However, an issue emerging in this scenario is that conventional supply chain management (SCM) procedures are unable to identify the potential proposal for a particular user. Modern businesses need to build integrated supply chains, which require well-developed infrastructure and easily available complementary services, relying on logistics as a networking technology. Supply chains of this generation grow from traditional individual desynchronized economic relations (linear models with some feedback and the simplest network configurations) to scalable, adaptable, harmonized partner networks. The logistics potential allows additional income by reducing the total costs of participants in the network, thus increasing the competitiveness of companies; this can be implemented based on new models of interaction in the current digital environment through, firstly, system integration. Our goal consists of identifying the essential characteristics of system integration and substantiating the methods for its implementation in the digital economy. The study is based on the analysis of global best practices, considering the reports from leading consulting companies and competent analytical agencies. We have confirmed that the role of a virtual system integrator of supply chains belongs to logistics platforms; the effects of a transition to platform business models are discussed in detail.

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