Thermal Interface Materials and Cooling Technologies in Microelectronic Packaging—A Critical Review

2018 ◽  
Vol 15 (2) ◽  
pp. 63-74
Author(s):  
Dinesh P. R. Thanu ◽  
Boxi Liu ◽  
Marco Aurelio Cartas
Keyword(s):  
Integrated Circuit ◽  
Semiconductor Industry ◽  
Thermal Dissipation ◽  
System Level ◽  
Thermal Interface Materials ◽  
Thermal Interface ◽  
Field Programmable ◽  
Increasing Demand ◽  
And Performance ◽  
Interface Materials

The ever increasing demand for fast computing has led to heterogeneous integration of packages as can be seen in the latest Xeon family segments in the market. Microprocessors are now adjacent to memory chips, transceivers, field-programmable gate arrays, and even other microprocessors within a single substrate. These complex designs have instigated an increase in cooling demand for microprocessors, and hence, there has been an increased focus within the semiconductor industry on developing advance thermal solutions. From the packaging level, thermal interface materials (TIMs) play a key role in thermally connecting various components within the package and helps reduce the thermal resistance between the die surfaces and integrated heat spreaders. From the system level, cooling technology is critical to attain the desired overall thermal dissipation and performance. In this review, progress made in the area of TIMs and system cooling solutions are presented. The focus is on the evolution of TIMs and cooling technologies and their challenges in the integrated circuit packaging. Merits and demerits of various TIM materials available in the commercial market are also discussed. The article will be concluded with some directions for the future that would be potentially very beneficial.

Mechanical Insertion and Reliability Testing of Thermal Interface Materials for Semiconductor Test and Burn-in Applications

2019 ◽  
Vol 2019 (1) ◽  
pp. 000584-000590
Author(s):  
Dave Saums ◽  
Tim Jensen ◽  
Carol Gowans ◽  
Seth Homer ◽  
Ron Hunadi
Keyword(s):  
Performance Test ◽  
Thermal Interface Materials ◽  
Test Procedures ◽  
Thermal Interface ◽  
Semiconductor Test ◽  
New Material ◽  
And Performance ◽  
And Control ◽  
Interface Materials

Abstract Very challenging requirements exist for thermal interface materials (TIMs) for demanding applications I semiconductor testing. Reliability requirements and multiple contact cycling requirements are substantially different and do not exist in traditional applications for TIMs. Developing new material types to meet these very exacting and unusual requirements has been a long-term goal and requires development of an unusual series of test procedures to demonstrate whether the desired reliability goals have been met. Use of a servo-driven, commercial test stand that has unique features for operation and control is described as the basis for a reliability and performance test program developed for these new materials in three phases, with new data for a fourth test phase added, and comparative values for material performance.

Linear Assembly of Oxidized Surface Treated Nanodiamonds in Polymer-Based Nanohybrids by Electric Field Inducement

2013 ◽  
Vol 761 ◽  
pp. 107-111
Author(s):  
Son Thanh Nguyen ◽  
Hong Baek Cho ◽  
Tadachika Nakayama ◽  
Minh Triet Tan Huynh ◽  
Hisayuki Suematsu ◽  
...  
Keyword(s):  
Electric Field ◽  
Structural Variation ◽  
Oxidation Process ◽  
Semiconductor Industry ◽  
Thermal Interface Materials ◽  
Insulation Property ◽  
Thermal Interface ◽  
Linear Assembly ◽  
The Matrix ◽  
Interface Materials

Linear assembly of densely packed oxidized nanodiamonds (OxNDs) was achieved in polyepoxide-based nanohybrid films. A homogeneous suspension of pre-polymer of polyepoxide and OxNDs was cast onto a polyamide-spacer and subjected to an electric field in order to induce relocation and stretched-assembles of the fillers before the mixture became cross-linked. The OxNDs suspended readily, forming linear assemblies of OxNDs (LAOxNDs) of varying thicknesses, and aligned vertical to the film surfaces. Nanohybrid films with assemblies of LAOxNDs led to a significant enhancement in thermal conductivity while maintained the electrical insulation property of the polyepoxide. Mechanisms for the formation and structural variation of LAOxNDs in the matrix are elaborated regarding the improvement in physical properties. The present ambient-oxidation process and field-induced application are simple, but effective in enhancing the thermal properties of the polymer-based hybrids, and hence, promising for applications in the semiconductor industry, such as thermal interface materials.

scholarly journals A Meta-study on the Thermal Properties of Carbon Nanotubes in Thermal Interface Materials

2019 ◽  
Vol 6 ◽  
pp. 16-27
Author(s):  
Scott Clarkson ◽  
Asah H Khan ◽  
Dipendra Singh
Keyword(s):  
Thermal Conductivity ◽  
Carbon Nanotubes ◽  
Integrated Circuit ◽  
Operation Time ◽  
Transfer Efficiency ◽  
Thermal Interface Materials ◽  
Thermal Interface ◽  
Thermal Paste ◽  
Thermal Transfer ◽  
Interface Materials

Computer Integrated Circuit (IC) microprocessors are becoming more powerful and densely packed while cooling mechanisms are seeing an equivalent improvement to compensate. A significant limit to cooling performance is thermal transfer between die and heatsink. In this meta study we evaluate carbon nanotube (CNT) thermal interface materials (TIMs) in order to determine how to maximise thermal transfer efficiency. We gathered information from over 15 articles focused on the thermodynamic parameters of CNT TIMs from databases such as Scopus, IEEE Xplore and ScienceDirect. Articles were filtered by key words including ‘carbon nanotubes’ and ‘thermal interface materials’ to identify scientific articles relevant to our research on TIMs. From our meta study we have found that enhancing CNTs will provide the best improvement in TIMs. The parameters analysed to determine TIM performance included thermal resistance, thermal conductivity and the effect of CNT concentration on computer operation time. Through our investigation we understood that increasing the concentration of CNT from 0 to 2 wt % increases the operation time from 75 seconds at 66°C to 200s at 63°C as well as increasing the thermal conductivity by 1.82 times for the AS5 thermal paste with 2 wt % CNT. Furthermore, CNT TIM pastes with less thickness have a lower thermal resistance of 0.4 K/W. However not all these parameters have been tested with computer chips. This means that in order to increase current heat transfer efficiency limit, we must integrate these parameters into experimental models. Keywords: Thermal Interface Material; Thermal Paste; Carbon Nanotubes; Thermal Transfer Efficiency; Integrated Circuit; Heat Sink; Heat Dissipation.

An Experimental Investigation of the Contribution of Different Carbonaceous Nanomaterials to Thermal Conductance of Thermal Interface Materials

2019 ◽  
Author(s):  
Prashant Singh ◽  
Seul-Yi Lee ◽  
Roop L. Mahajan
Keyword(s):  
Experimental Investigation ◽  
Graphene Oxide ◽  
Thermal Performance ◽  
Morphological Changes ◽  
Thermal Conductance ◽  
Thermal Dissipation ◽  
Rubber Matrix ◽  
Thermal Interface Materials ◽  
Thermal Interface ◽  
Interface Materials

Abstract With the increasing demand for higher performance and progressive miniaturization of electronic packages, power densities and the attendant thermal dissipation requirements are expected to escalate. One of the important strategies to ensure reliable operation at the device and die (chip) levels is the use of Thermal Interface Materials (TIMs) to reduce the thermal resistance between the chip and the heat sink. In this study, we have carried out an experimental investigation to characterize thermal conductance of TIMs composed of commercially available graphene (c-rGO), graphene nanoplatlets (GNPs) of different lateral sizes (5, 15 and 25 μm), and our in-house produced thermally reduced graphene oxide at 600°C (T-rGO-600). These additives were loaded in a silicone rubber matrix where their loading fraction was fixed at 2% by weight. Thermal conductance of the resulting TIMs was determined by measuring heat flow, in steady state, through a TIM sandwiched between two metal blocks. The thermal conductance values representing the combined resistance of the composite material and the contact resistances between the TIM and the metal blocks were measured at different heat flux levels across the TIM. The results show that the thermal conductance values were independent of the heat load across the TIM as well as the TIM temperature. Further, a detailed investigation of the surface functionality and structural properties has revealed that the in-house produced T-rGO-600 has superior thermal conductance when compared to the above-mentioned carbonaceous nanomaterials, which are considered as potential candidates for enhancing thermal performance of TIMs. The data demonstrates that this result is attributable to the formation of the surface functional groups and the associated morphological changes during the reduction of graphene oxide to the T-rGO-600. Among the different GNPs tested, the GNP-15 exhibited superior thermal performance compared to the GNP-5 and GNP-25 samples.

Characteristics of Organic-Based Thermal Interface Materials Suitable for High Temperature Operation

2019 ◽  
Vol 2019 (HiTen) ◽  
pp. 000041-000044
Author(s):  
Baron Wang ◽  
Andrea S. Chen ◽  
Randy H.Y. Lo
Keyword(s):  
Elevated Temperatures ◽  
Large Body ◽  
Thermal Interface Material ◽  
Thermal Dissipation ◽  
Thermal Interface Materials ◽  
Packaging Materials ◽  
Back Side ◽  
Thermal Interface ◽  
Operating Temperatures ◽  
Interface Materials

Abstract Historically, for semiconductors subject to standard operating temperatures--which tend not to exceed 125°C--the Tg (glass transition temperatures) of the organic packaging materials protecting the chips is usually around 175°C. Given that, when it comes to electronics operating at high temperatures—typically an environment where the ambient temperature exceeds 200°C—the use of organic materials is generally prohibited due to rapid degradation. At those elevated temperatures, the packaging materials selected are generally composed of metals and ceramics but these materials come with their own shortfalls as well as higher material and manufacturing costs. Therefore, it would be desirable if there were ‘ruggedized’ versions of the organic compounds so commonly used in semiconductor packaging but available for more extreme temperatures, both to reduce cost and package footprint. Meanwhile, the demands from recent developments in high performance computing (HPC) and high-speed data networks means a greater need for increased power and thermal dissipation coupled with very large package body sizes to accommodate the high I/O count. The latest in server microprocessor (MPU) products can easily generate up to 300W during operation, and the heat generated must be quickly transported away from chip to prevent the threat of thermal shutdown. The thermal dissipation issue is controlled by the use of heat spreaders and heat sinks, both of which are intended to make contact with the back-side of a flipped MPU via a thermal interface material (TIM), as part of a large die, large body-size flip-chip ball grid array (FCBGA) package. The thermal interface materials discussed here are examples of organic engineered materials that are capable of withstanding higher operating temperatures than typically seen by semiconductors encased in organic-based packaging. This paper will look at the key material and mechanical attributes for a good thermal interface material, examines the pros-and-cons of various thermal interface material formulations, and discusses the factors for reliable thermal dissipation performance.

Manufacturability trade-offs of bare-die FCBGA package using thin or core-less substrate

2017 ◽  
Vol 2017 (DPC) ◽  
pp. 1-26
Author(s):  
Ankita Verma ◽  
Baqar Tabrez ◽  
Lam Duong ◽  
Martin Wuest
Keyword(s):  
Thermal Performance ◽  
Flip Chip ◽  
Material Selection ◽  
Full Range ◽  
Thermal Dissipation ◽  
Thermal Interface Materials ◽  
Assembly Process ◽  
Thermal Interface ◽  
Performance Requirement ◽  
Interface Materials

With the increasing demand for thinner packages and higher electrical & thermal performance requirement bare-die packaging is an inevitable trend that is growing. The assembly process for manufacturing of bare die in thin or core-less substrate FCBGA packages can be challenging especially considering the effects of substrate warpage during flip chip bonding and the excessive warpage of the flip chip package. We are evaluating the manufacturing risks during bare-die FCBGA package assembly to eliminate package warpage failures using experimental techniques and improve the functional performance of the flip chip package. Various substrate & under fill materials were tested for package warpage values for warpage-free control in the full range of temperature variation. Die designs at 28nm and 40nm process nodes are extremely complex in order to achieve the highest electrical & thermal performance requirement. Die design constraints on advanced process nodes necessitate increased thermal dissipation requirements thereby requiring investigation of thermal solutions utilizing thermal interface materials (TIM) with heat-sink. The interaction of such thermal solutions with the bare die packages is evaluated using various trial and error for material selection, experimental and simulation techniques to improve the assembly process. This study also focuses on selection of thermal interface materials [TIMs] and heat sinks which have considerable impact on die integrity during package assembly and/or during process of removal for failure analysis.

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