Effect of ENEPIG Surface Finish on the Vibration Reliability of Solder Interconnects

2013 ◽  
Vol 2013 (1) ◽  
pp. 000115-000119 ◽  
Author(s):  
Sandeep Menon ◽  
Adam Pearl ◽  
Michael Osterman ◽  
Michael Pecht

Surface finishes are used to preserve and promote solderability of exposed copper metallization on printed wiring boards. While in the best of worlds, the solder used in assembly should dictate the solder interconnect reliability, surface finishes are known to have an effect. The effect of surface finishes on solder interconnect reliability can be particularly strong under high strain rate loading conditions. In this study, durability of solder interconnects formed between BGAs and electroless nickel, electroless palladium, immersion gold (ENEPIG) finished pads assembled using SnPb and SAC305 solders under harmonic vibration loading is examined. ENEPIG test specimens with two thicknesses of palladium were evaluated. Isothermal preconditioning levels at 100°C for 24 hrs and 500 hrs were included to evaluate the impact of intermetalic evolution on the durability of the soldered interconnects. For comparison, tests specimens created with immersion silver (ImAg) finished printed wiring boards were also included. The failure data obtained found the durability of interconnects formed with ENEPIG finish was comparable or better durability than the durability of interconnects formed with ImAg finish irrespective of the solder. The tests indicate that the use of a thicker palladium layer reduced the degradation in durability which occurred from isothermal aging.

2004 ◽  
Vol 03 (06) ◽  
pp. 803-813 ◽  
Author(s):  
A. C. SPOWAGE ◽  
C. M. THONG ◽  
P. A. COLLIER ◽  
G. Y. LI

One of the most pressing challenges facing today's electronics packaging industry is to identify reliable and cost-effective solder alloys to replace toxic lead containing solder. Besides evaluating new alloy compositions and improving the soldering process, it is important to understand how surface finishes applied to the copper metallization affect the joint characteristics. The characterization of intermetallics during the early stages of nucleation and the growth is hindered by the nanoscopic grain size and layer thickness. This study investigates the impact of PCB finish and solder type on the interfacial intermetallics. Five types of solder and four types of finishes were used: Sn37Pb (SP), Sn3.5Ag (SA), Sn3.5Ag0.7Cu (SAC), Sn2Ag0.5Cu4Bi (SACB) and Sn3Bi8Zn (SBZ) solders, combined with immersion Silver ( I – Ag ), electroless Nickel-immersion Gold (ENIG), Organic Solderability Preservative (OSP) and immersion Tin ( I – Sn ). It was shown that both the SP and SAC solders follow a parabolic growth model and that the surface finish has a significant effect on the intermetallic morphology and growth kinetics. A combined SEM and XRD investigation was shown to be a suitable method for characterizing nanoscale intermetallics.


Author(s):  
George M. Wenger ◽  
Richard J. Coyle ◽  
Patrick P. Solan ◽  
John K. Dorey ◽  
Courtney V. Dodd ◽  
...  

Abstract A common pad finish on area array (BGA or CSP) packages and printed wiring board (PWB) substrates is Ni/Au, using either electrolytic or electroless deposition processes. Although both Ni/Au processes provide flat, solderable surface finishes, there are an increasing number of applications of the electroless nickel/immersion gold (ENi/IAu) surface finish in response to requirements for increased density and electrical performance. This increasing usage continues despite mounting evidence that Ni/Au causes or contributes to catastrophic, brittle, interfacial solder joint fractures. These brittle, interfacial fractures occur early in service or can be generated under a variety of laboratory testing conditions including thermal cycling (premature failures), isothermal aging (high temperature storage), and mechanical testing. There are major initiatives by electronics industry consortia as well as research by individual companies to eliminate these fracture phenomena. Despite these efforts, interfacial fractures associated with Ni/Au surface finishes continue to be reported and specific failure mechanisms and root cause of these failures remains under investigation. Failure analysis techniques and methodologies are crucial to advancing the understanding of these phenomena. In this study, the scope of the fracture problem is illustrated using three failure analysis case studies of brittle interfacial fractures in area array solder interconnects. Two distinct failure modes are associated with Ni/Au surface finishes. In both modes, the fracture surfaces appear to be relatively flat with little evidence of plastic deformation. Detailed metallography, scanning electron microscopy (SEM), energy dispersive x-ray analysis (EDX), and an understanding of the metallurgy of the soldering reaction are required to avoid misinterpreting the failure modes.


Author(s):  
Adam Pearl ◽  
Michael Osterman

Electroless Nickel/Electroless Palladium/Immersion Gold (ENEPIG), which has been used in component packaging, has been gaining attention as a surface finish for printed wiring boards. The primary role of a printed wiring board surface finish is to provide a solderable surface for assembly, creating a reliable solder interconnect. With regards to reliability, the increased use of mobile electronics has resulted in the need to consider the ability of interconnects to withstand repeated mechanical shocks. This paper examines the drop reliability of both SnPb and SAC305 interconnects formed on ENEPIG finished printed wiring boards. For comparison, the drop reliability test results for similar boards with Immersion Silver (ImAg) board finish are included. Test boards include BGA and resistor packages. The boards are dropped 500 times to achieve failure across the components. Failure analysis revealed that the dominant failure mode for BGA packages on the ENEPIG finish was cracking in the solder balls at the component interface, while for the ImAg finish the dominant failure mode was cratering in the board laminate below the solder pad. For the resistor packages, cracking through the solder joint at the component interface was the dominant failure mode for both the ENEPIG and ImAg finishes. The drop results indicate that both finishes are suitable for systems that could experience mechanical shock due to drop, with components soldered onto ENEPIG with a SAC 305 solder having the highest survivability. The combination of SnPb and ImAg was found to be superior to SAC 305 and ImAg.


2016 ◽  
Vol 2016 (1) ◽  
pp. 000117-000122 ◽  
Author(s):  
Cong Zhao ◽  
Thomas Sanders ◽  
Zhou Hai ◽  
Chaobo Shen ◽  
John L. Evans

Abstract This paper investigates the effect of long term isothermal aging and thermal cycling on the reliability of lead-free solder mixes with different solder compositions, PCB surface finishes, and isothermal aging conditions. A variety of surface mount components are considered, including ball grid arrays (BGAs), quad flat no-lead packages (QFNs) and 2512 Surface Mount Resistors (SMRs). 12 lead-free solder pastes are tested; for BGA packages these are reflowed with lead-free solder spheres of SAC105, SAC305 and matched doped solder spheres (“matched” solder paste and sphere composition). Three surface finishes are tested: Organic Solderability Preservative (OSP), Immersion Silver (ImAg), and Electroless Nickel Immersion Gold (ENIG). All test components are subjected to isothermal aging at 125°C for 0 or 12 months, followed by accelerated thermal cycle testing from −40°C to 125°C. Data from the first 1500 cycles is presented here, with a focus on the effect of surface finish on package reliability. Current results demonstrate that the choice of surface finish has a strong effect on reliability. However, different solder materials appear to show different reliability trends with respect to the surface finishes, and the reliability trends of BGA and SMR packages also diverge.


2012 ◽  
Vol 2012 (1) ◽  
pp. 000510-000513
Author(s):  
Sandeep Menon ◽  
Michael Osterman ◽  
Michael Pecht

With increased portability and miniaturization of modern day electronics, the mechanical robustness of these systems has become more of a concern. Existing standards for conducting mechanical durability tests of electronic assemblies include bend, shock/drop, vibration and torsion. Though these standards provide insights into both cyclic fatigue and overstress damage incurred in the solder interconnects (widely regarded as the primary mode of failure in electronic assemblies), they fail to address the impact of time dependent (creep) behavior due to sustained mechanical loads on the solder interconnect durability. It has been seen that the solder durability under thermal cycling loads is inversely proportional to the dwell time or hold time at either temperature extreme of the imposed temperature cycle. Fatigue life models, which include dwell time, have been developed for solder interconnects subject to temperature cycling. However the fatigue life models that have been developed in literature for solder interconnects under mechanical loads fail to address the impact the duration of loading. In this study, solder interconnect test vehicles were subject to cyclic mechanical bending with varying dwell times in order to understand the impact of duration of mechanical loads on the solder interconnect durability. The solder interconnects examined in this study were formed with 2512 resistor packages using varying solder compositions (SnPb and SAC305). In order to evaluate the impact of dwell time, the boards were tested with a 60 second and a 300 second dwell time on both extremes of the loading profile. It was observed that an increase in dwell time of the loading profile resulted in a decrease in the characteristic life of the solder interconnects.


Author(s):  
Anil Kurella ◽  
Aravind Munukutla ◽  
J.S. Lewis

Abstract PCB surface finishes like Immersion silver (ImAg) are commonly used in Pb-free manufacturing environments following RoHS legislation. With this transition, however the numbers of field failures associated with electrochemical migration, copper sulphide corrosion, via barrel galvanic corrosion are on a steady rise. More often than not ImAg surfaces seem to assist these failing signatures. As computers penetrate into emerging markets with humid and industrialized environments there is a greater concern on the reliability and functionality of these electronic components.


Author(s):  
Cheng-Piao Lin ◽  
Chin-Hsin Tang ◽  
Cheng-Hsu Wu ◽  
Cheng-Chun Ting

Abstract This paper analyzes several SRAM failures using nano-probing technique. Three SRAM single bit failures with different kinds of Gox breakdown defects analyzed are gross function single bit failure, data retention single bit failure, and special data retention single bit failure. The electrical characteristics of discrete 6T-SRAM cells with soft breakdown are discussed and correlated to evidences obtained from physical analysis. The paper also verifies many previously published simulation data. It utilizes a 6T-SRAM vehicle consisting of a large number of SRAM cells fabricated by deep sub-micron, dual gate, and copper metallization processes. The data obtained from this paper indicates that Gox breakdown location within NMOS pull-down device has larger a impact on SRAM stability than magnitude of gate leakage current, which agrees with previously published simulation data.


2010 ◽  
Vol 2010 (1) ◽  
pp. 000298-000305
Author(s):  
Tae-Kyu Lee ◽  
Weidong Xie ◽  
Thomas R. Bieler ◽  
Kuo-Chuan Liu ◽  
Jie Xue

The interaction between isothermal aging and long-term reliability of fine pitch ball grid array (BGA) packages with Sn-3.0Ag-0.5Cu (wt%) solder ball interconnects are investigated. In this study, 0.4mm fine pitch packages with 0.3mm diameter Sn-Ag-Cu solder balls are used. Two different die sizes and two different package substrate surface finishes are selected to compare the internal strain impact and alloy effect, especially the Ni effect during thermal cycling. To see the thermal impact on the thermal performance and long-term reliability, the samples are isothermally aged and thermal cycled from 0 to 100°C with a 10minute dwell time. Based on weibull plots for each aging condition, the lifetime of the package reduced approximately 44% with 150°C aging precondition. The microstructure evolution is observed during thermal aging and thermal cycling with different phase microstructure transformations between electrolytic Ni/Au and OSP surface finishes, focusing on the microstructure evolution near the package side interface. Different mechanisms after aging at various conditions are observed, and their impacts on the fatigue life of solder joints are discussed.


2011 ◽  
Vol 2011 (1) ◽  
pp. 000516-000520 ◽  
Author(s):  
John Ganjei ◽  
Ernest Long ◽  
Lenora Toscano

The continuing drive for ever increasing performance enhancement in the electronics industry, in combination with the recent, very significant increase in precious metal costs have left fabricators and OEMs questioning what the best, most cost effective, surface finish is for high reliability applications. Currently, the IC substrate market relies heavily on electrolytic nickel and gold as a solderable and superior wire bondable surface. The use of this finish has allowed manufacturers to avoid the reliability concerns However, this choice also results in significant design restraints being imposed. Many in the industry are now investigating the use of electroless nickel/electroless palladium/immersion gold (ENEPIG) to achieve both high reliability and performance, without the negative design restraints imparted by the use of electrolytic processes. However, over the last year alone, the industry has watched the price of gold increase by 50% and that of palladium double [1]. With this in mind, and considering the historic precedent set in the mid 1990’s when ENEPIG was also evaluated as a surface finish for printed circuit boards, when coincidentally, the cost of palladium also reached an all time high, it should be remembered that the electronics industry quickly moved to evaluate alternate, more cost sustainable, surface finishes. This paper details the use of lower cost, alternate surface finishes for IC substrate applications, with particular experimental focus on gold wire bonding capabilities and BGA solderability of the finishes described. The paper also discusses related process cycle advantages and the significantly reduced operating costs associated with these new finishes.


Sign in / Sign up

Export Citation Format

Share Document