We review the modeling of silicon MOS devices in the 10–300 K temperature range with an emphasis on the specifics of low-temperature operation. Recently developed one-dimensional models of long-channel transistors are discussed in connection with experimental determination and verification of the effective channel mobility in a wide temperature range. We also present analytical pseudo-two-dimensional models of short-channel devices which have been proposed for potential use in circuit simulators. Several one-, two-, and three-dimensional numerical models are discussed in order to gain insight into the more subtle details of the low-temperature device physics of MOS transistors and capacitors. Particular attention is paid to freezeout effects which, depending on the device design and the ambient temperature range, may or may not be important for actual device operation. The numerical models are applied to study the characteristic time scale of freezeout transients in the space-charge regions of silicon devices, to the analysis and suppression of delayed turn-off in MOS transistors with compensated channel, and to the temperature dependence of three-dimensional effects in short-channel, narrow-channel MOSFETs.
