Implementation and Performance Evaluation of a Bivariate Cut-HDMR Metamodel for Semiconductor Packaging Design Problems with a Large Number of Input Variables

A metamodeling technique based on Bivariate Cut High Dimensional Model Representation (Bivariate Cut HDMR) is implemented for a semiconductor packaging design problem with 10 design variables. Bivariate Cut-HDMR constructs a metamodel by considering only up to second-order interactions. The implementation uses three uniformly distributed sample points (s = 3) with quadratic spline interpolation to construct the component functions of Bivariate Cut-HDMR, which can be used to make a direct comparison with a metamodel based on Central Composite Design (CCD). The performance of Bivariate Cut-HDMR is evaluated by two well-known error metrics: R-squared and Relative Average Absolute Error (RAAE). The results are compared with the performance of CCD. Bivariate Cut HDMR does not compromise the accuracy compared to CCD, although the former uses only one-fifth of sample points (201 sample points) required by the latter (1045 sample points). The sampling schemes and the predictions of cut-planes and boundary-planes are discussed to explain possible reasons for the outstanding performance of Bivariate Cut HDMR.

RSOB Shorting Defect Resolution through Looping Optimization and Ball Placement at Wirebond Process

Wirebonding process is one of the most challenging assembly manufacturing process in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to resolve the wire to die shorting on reverse stitch on ball (RSOB) and prevent irregular looping height for the substrate land grid array (LGA) device. Comprehensive parameter optimization was done particularly on the wirebond looping to ensure that no wire depression and no capillary hitting would occur wirebonding setup. Ultimately, the optimized wirebonding parameter prevented the occurrence of looping issues during the lot process. For future works, the configuration and technique could be applied on packages with similar situation.

Wire Shorting Defect Mitigation on Substrate LGA Device Through Wirebond Capillary Adjustment

Semiconductor packaging technologies are getting more challenging with regards to assembly manufacturing due to several factors such as complex package layout, process and machine capability, and materials compatibility. This paper discusses the wirebonding process difficulty and the solution to mitigate the wire-to-wire shorting defect on a substrate land grid array (LGA) device that causes low yield on engineering trials. Using a high-speed camera equipment, the actual process was monitored. It was then noticed that the cause of wire-to-wire shorting issue was a capillary hitting on previous wire. Ultimately, with the new capillary design and process optimization, wire-to-wire shorting defect was successfully mitigated.

Assembly Wirebond Process Solution for Mitigating Leadframe Bouncing on Multi-Die QFN Device

Modification and improvement of an existing tooling design in semiconductor packaging industry has been a usual practice, to enhance the current setup and to provide a solution to a specific assembly problem. This paper discusses the solution in eliminating the smashed ball defect occurrence observed after wirebond process. Smashed ball is usually encountered if the unit is unstable and creates a bouncing effect during wirebond process. It is therefore important to mitigate this micro-bouncing effect by analyzing the package design and the window clamp and top plate (WCTP). The objective is to increase the stability of the unit during wirebonding, especially for quad-flat no-leads (QFN) package with no tape. To achieve this, the solution is to alter the vacuum hole design of the top plate from single hole per unit to multiple holes of varied sizes per unit. Ultimately, after changing the design of the top plate, the micro-bouncing encountered during wirebond process was significantly reduced. This in turn created a consistent ball formation in all bonded wires. The comparative data presented in this paper confirmed the effectivity of the redesigned WCTP. For future works and studies, the improvement and learnings could be used on devices with comparable configuration.

Formation mechanism of Cu/Cu3Sn–Cu/Cu interconnections based on solder-filled microporous copper as interlayer via a current-assisted thermal compression bonding

In this study, a Cu/Cu3Sn–Cu/Cu interconnection can be achieved based on solder-filled microporous copper (MPC) as interlayer via a current-assisted thermal compression bonding. The high-temperature soldering connection materials can be used in the third-generation semiconductor packaging, so as to meet the promising application in high-temperature power device packaging. The influence of auxiliary current on the microstructure evolution of Cu–Sn IMCs and its formation mechanism were studied. Experiments show that the action of Joule heat coupled with the electron wind significantly enhanced the interfacial reaction at the Cu/Sn metallization interface. The microstructure of Cu6Sn5 changed from scallop-like into columnar due to constitutional supercooling, and the dispersion distribution of Cu6Sn5 also changed. The growth constitutive equations of Cu3Sn in bondlines were established under current-assisted thermal compression bonding process.

Impact Modifiers and Compatibilizers for Versatile Epoxy-Based Adhesive Films with Curing and Deoxidizing Capabilities

Epoxy resins with acidic compounds feature adhesion, robustness, and deoxidizing ability. In this study, hybrid adhesive films with deoxidizing and curing capabilities for semiconductor packaging were fabricated. The compatibilizing effects and mechanical properties were chiefly investigated by using various additive binders (thermoplastic amorphous polymers) and compatibilizing agents. The curing, deoxidizing, thermal, and rheological properties were systematically investigated. For uniform film formation and maximizing deoxidizing curable abilities, a thermoplastic--thermoset mixture containing a phenyl and carboxylic acid-based additive (benzoic acid), and a polycarbonate was chosen as the model adhesive film. Without either a phenyl or an acidic group in the compatibilizing agent, deoxidizing and compatibilizing effects were not achieved. The manufactured hybrid adhesive film can be effectively used, especially for electronic devices that require deoxidization and adhesion.

Enhanced Wirebonding Technique on QFN Device with Critical Die Reference

Wirebonding is one of the most challenging assembly manufacturing processes in semiconductor packaging industry. This paper discussed the wirebonding challenge and the solution to mitigate misplaced ball issues and prevent pattern recognition alignment errors. Parameter optimization particularly on wirebond looping was done to ensure that the silicon die’s L-fiducial is visible and not obstructed by the wires, which is the operator point or die reference of the unit during wirebonding setup. Ultimately, the optimized wirebonding parameter prevented the pattern recognition alignment error and misplaced ball issues during the lot process. For future works, the configuration and technique could be applied on packages with the similar situation.