The study aimed at the investigation and application of SnS thin film semiconductor as a channel layer semiconductor in the assembly of an electric double layer field effect transistor which is important for the achievement and development of novel device concepts, applications and tuning of physical properties of materials since the reported EDLFET and the modulation of electronic states have so far been realised on oxides, nitrides, carbon nanotubes and organic semiconductor but has been rarely reported for the chalcogenides. Honey was used as a gel like electrolytic gate dielectric to generate an enhanced electric field response over SnS semiconductor channel layer and due to its ability to produces high on-current and low voltage operation while forming an ionic gel-like solution similar to ionic gels which consist of ionic liguids. SnS gated honey Electric double layer field effect transistor was assembled using tin sulphide (SnS) thin film as semiconductor channel layer and honey as gate dielectric. The measured gate capacitance of honey using LCR meter was measured as 2.15 μF/ cm2 while the dielectric constant is 20.50. The semiconductor layer was deposited using Aerosol assisted chemical vapour deposition and annealed in open air at 250 on an etched region about the middle of a 4×4 mm FTO glass substrate with the source and drain electrode region defined by the etching and masking at the two ends of the substrate. Iridium was used as the gate electrode while a copper wire was masked to the source and drain region to create electrode contact. The Profilometry, X-ray diffraction, Scanning electron microscope, Energy dispersive X-ray spectroscopy, Hall Effect measurement and digital multimeters were used to characterise the device. The SnS thin film was found to be polycrystalline consisting of Sn and S elements with define grains, an optical band of 1.42 eV and of 0.4 μm thickness. The transistor operated with a p type channel conductivity in a depletion mode with a field effect mobility of 16.67 cm2/Vs, cut-off voltage of 1.6 V, Drain saturation current of1.35μA, a transconductance of -809.61 nA/V and a sub threshold slope of -1.6 Vdec-1 which is comparable to standard specifications in Electronics Data sheets. Positive gate bias results in a shift in the cut off voltage due to charge trapping in the channel/dielectric interface.
Surface Morphology of Polyimide Thin Film Dip-Coated on Polyester Filament for Dielectric Layer in Fibrous Organic Field Effect Transistor