Improving Stability of Pentacene Field-Effect Transistors with Post-Annealing

2007 ◽  
Vol 1029 ◽  
Author(s):  
Shun-Wei Liu ◽  
Jia-Cing Huang ◽  
Chih-Chien Lee ◽  
Chin-Ti Lee ◽  
Juen-Kai Wang
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Annealing Treatment ◽  
Drain Current ◽  
Semiconductor Layer ◽  
Post Annealing ◽  
Source Voltage ◽  
Effect Transistor ◽  
Improved Performance ◽  
Contact Field

AbstractIn this report, we demonstrate that the performance and stability of pentacene top-contact field-effect transistor can be greatly improved with post-annealing treatment. After post-annealing at 90°C for 12 hours in nitrogen environment, the hole field-effect mobility of 0.3 cm2/Vs and the on/off current ratio of 107 were achieved, demonstrating 100% improvement in performance after the post-annealing treatment. The decay rate of drain current at constant gate and drain-source voltage was found to be decreased by more than 40%. The improved performance is attributed to the elimination of trapped holes and lattice defects in the organic semiconductor layer due to the post-annealing process.

Modeling the Carrier Mobility in Nanowire Channel FET

2007 ◽  
Vol 1017 ◽  
Author(s):  
Werner Prost ◽  
Kai Blekker ◽  
Quoc-Thai Do ◽  
Ingo Regolin ◽  
Sven Müller ◽  
...  
Keyword(s):  
Field Effect ◽  
Carrier Mobility ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Static Field ◽  
Device Model ◽  
Inas Nanowires ◽  
Effect Transistor ◽  
Long Channel

AbstractWe report on the extraction of carrier type, and mobility in semiconductor nanowires by adopting experimental nanowire field-effect transistor device data to a long channel MISFET device model. Numerous field-effect transistors were fabricated using n-InAs nanowires of a diameter of 50 nm as a channel. The I-V data of devices were analyzed at low to medium drain current in order to reduce the effect of extrinsic resistances. The gate capacitance is determined by an electro-static field simulation tool. The carrier mobility remains as the only parameter to fit experimental to modeled device data. The electron mobility in n-InAs nanowires is evaluated to µ = 13,000 cm2/Vs while for comparison n-ZnO nanowires exhibit a mobility of 800 cm2/Vs.

scholarly journals Nonlinearity Analysis of Quantum Capacitance and its Effect on Nano-Graphene Field Effect Transistor characteristics

2021 ◽  
Author(s):  
MUNINDRA MUNINDRA ◽  
DEVA NAND
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Charge Carrier Concentration ◽  
Single Layer Graphene ◽  
Quantum Capacitance ◽  
Large Area ◽  
Source Voltage ◽  
Current Calculation ◽  
The Impact

Abstract A simple, compact, and fundamental physics-based quasi-analytic model for Single layer graphene field effect transistors (GFETs) with large area graphene is presented in which the quantum mechanical density gradient method is utilised. The basic device physics of the two-dimensional (2D) graphene channel is studied analytically. This modeling leads to the precise drain current calculation of the GFETs. The drain current calculation for GFETs starts from charge carrier concentration, its density of states and quantum capacitance(QC). QC depends on the channel voltage as a function of gate to source voltage Vgs and drain to source voltage Vds primarily. The formulation of the drain current with velocity saturation has been done by the Monte Carlo simulation method. The performance of the analytical GFETs model is present the precise values of QC, its impact on drain current and transfer as well as output characteristics. The impact of QC at nanometer technology adds the nonlinearity to characteristics curves. The proposed method provides better results as compared with the previous analytical and simulated results.

NOVEL STRUCTURES FOR CARBON NANOTUBE FIELD EFFECT TRANSISTORS

2009 ◽  
Vol 23 (19) ◽  
pp. 3871-3880 ◽  
Author(s):  
RAHIM FAEZ ◽  
SEYED EBRAHIM HOSSEINI
Keyword(s):  
Carbon Nanotube ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Digital Circuits ◽  
Field Effect Transistors ◽  
Conventional Structure ◽  
Source Voltage ◽  
Effect Transistor ◽  
Output Characteristics ◽  
Novel Structures

A carbon nanotube field effect transistor (CNTFET) has been studied based on the Schrödinger–Poisson formalism. To improve the saturation range in the output characteristics, new structures for CNTFETs are proposed. These structures are simulated and compared with the conventional structure. Simulations show that these structures have a wider output saturation range. With this, larger drain-source voltage (Vds) can be used, which results in higher output power. In the digital circuits, higher Vds increases noise immunity.

scholarly journals Low temperature multi-differential operational amplifier

Doklady BGUIR ◽  
2021 ◽  
Vol 19 (5) ◽  
pp. 52-60
Author(s):  
O. V. Dvornikov ◽  
V. A. Tchekhovski ◽  
V. L. Dziatlau ◽  
A. V. Kunts ◽  
N. N. Prokopenko
Keyword(s):  
Low Temperature ◽  
Integrated Circuits ◽  
Operational Amplifier ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Instrumentation Amplifier ◽  
Current Consumption ◽  
Effect Transistor

A multi-differential operational amplifier, called OAmp3, designed for operation at temperatures up to minus 197 °С and developed on bipolar transistors and junction field-effect transistors of the master slice array МН2ХА030, is considered in the article. The circuitry features of the OAmp3 allow, due to the use of various negative feedback circuits, to implement a set of functions necessary for signal processing on a single amplifier: amplification (or current – voltage conversion), filtering, shift of the constant output voltage level. The performed measurements of OAmp3, connected as instrumentation amplifier circuit, showed that all manufactured products retain their performance in the temperature range from minus 150 °С to 20 °С, and individual samples – at minus 197 °С. It was found that the main reason for the loss of OAmp3 performance is an increase of the resistance of semiconductor resistors by almost 5.4 times at minus 197 °С compared to normal conditions and decrease in the junction field-effect transistor drain current. Together, these factors lead to decrease in the current consumption of the OAmp3 by almost 31 times at minus 180 °С compared to normal conditions. To reduce the temperature dependence of the current consumption and, thus, save the OAmp3 operability at low temperatures without changing the technological route of integrated circuits manufacturing, it is proposed to replace high-resistance semiconductor resistors with “pinch-resistors” formed on a small-signal p-junction field-effect transistor. The article presents the OAmp3 connection circuit in the form of an instrumental amplifier, the method and results of low-temperature measurements of experimental samples.

scholarly journals A Novel Germanium-Around-Source Gate-All-Around Tunnelling Field-Effect Transistor for Low-Power Applications

Micromachines ◽  
2020 ◽  
Vol 11 (2) ◽  
pp. 164
Author(s):  
Ke Han ◽  
Shanglin Long ◽  
Zhongliang Deng ◽  
Yannan Zhang ◽  
Jiawei Li
Keyword(s):  
Low Power ◽  
Computer Aided Design ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Electrical Characteristics ◽  
Source Voltage ◽  
Effect Transistor ◽  
Supply Current ◽  
Aided Design

This paper presents a germanium-around-source gate-all-around tunnelling field-effect transistor (GAS GAA TFET). The electrical characteristics of the device were studied and compared with those of silicon gate-all-around and germanium-based-source gate-all-around tunnel field-effect transistors. Furthermore, the electrical characteristics were optimised using Synopsys Sentaurus technology computer-aided design (TCAD). The GAS GAA TFET contains a combination of around-source germanium and silicon, which have different bandgaps. With an increase in the gate-source voltage, band-to-band tunnelling (BTBT) in silicon rapidly approached saturation since germanium has a higher BTBT probability than silicon. At this moment, germanium could still supply current increment, resulting in a steady and steep average subthreshold swing ( S S AVG ) and a higher ON-state current. The GAS GAA TFET was optimised through work function and drain overlapping engineering. The optimised GAS GAA TFET exhibited a high ON-state current ( I ON ) (11.9 μ A), a low OFF-state current ( I OFF ) ( 2.85 × 10 − 9 μ A), and a low and steady S S AVG (57.29 mV/decade), with the OFF-state current increasing by 10 7 times. The GAS GAA TFET has high potential for use in low-power applications.

Drain-Current Deep Level Transient Spectroscopy Investigation on Epitaxial Graphene/6H-SiC Field Effect Transistors

2014 ◽  
Vol 778-780 ◽  
pp. 436-439 ◽  
Author(s):  
Sebastian Roensch ◽  
Stefan Hertel ◽  
Sergey A. Reshanov ◽  
Adolf Schöner ◽  
Michael Krieger ◽  
...  
Keyword(s):  
Deep Level Transient Spectroscopy ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Deep Level ◽  
Drain Current ◽  
Evaluation Procedure ◽  
Defect Centers ◽  
Effect Transistor ◽  
Transient Spectroscopy

The electrically active deep levels in a graphene / silicon carbide field effect transistor (FET) were investigated by drain-current deep level transient spectroscopy (ID-DLTS). An evaluation procedure for ID-DLTS is developed in order to obtain the activation energy, the capture cross section and the trap concentration. We observed three defect centers corresponding to the intrinsic defects E1/E2, Ei and Z1/Z2 in n-type 6H-SiC. The determined parameters have been verified by conventional capacitance DLTS.

scholarly journals Electrical characterization of si nanowire GAA-TFET based on dimensions downscaling

2021 ◽  
Vol 11 (1) ◽  
pp. 780
Author(s):  
Firas Natheer Abdul-Kadir ◽  
Yasir Hashim ◽  
Muhammad Nazmus Shakib ◽  
Faris Hassan Taha
Keyword(s):  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Electrical Characterization ◽  
Drain Current ◽  
Oxide Thickness ◽  
Si Nanowire ◽  
Effect Transistor ◽  
Current Characteristics

This research paper explains the effect of the dimensions of Gate-all-around Si nanowire tunneling field effect transistor (GAA Si-NW TFET) on ON/OFF current ratio, drain induces barrier lowering (DIBL), sub-threshold swing (SS), and threshold voltage (VT). These parameters are critical factors of the characteristics of tunnel field effect transistors. The Silvaco TCAD has been used to study the electrical characteristics of Si-NW TFET. Output (gate voltage-drain current) characteristics with channel dimensions were simulated. Results show that 50nm long nanowires with 9nm-18nm diameter and 3nm oxide thickness tend to have the best nanowire tunnel field effect transistor (Si-NW TFET) characteristics.

On transconductance in the p-channel Si/SiGe heteroj unction field effect transistor

1992 ◽  
Vol 70 (10-11) ◽  
pp. 963-968
Author(s):  
S. J. Kovacic ◽  
J. J. Ojha ◽  
J. H. Swoger ◽  
J. G. Simmons ◽  
J-P. Noël ◽  
...  
Keyword(s):  
Experimental Evidence ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Field Effect Transistors ◽  
Drain Current ◽  
Physical Structure ◽  
Factors Affecting ◽  
Inversion Channel ◽  
Current Conduction ◽  
Effect Transistor

Three factors affecting the transconductance characteristics of inversion-channel heterojunction field effect transistors are discussed. In each case, the effect on the hole population in the channel and, thereby, on the transconductance of the device is hypothesized. Experimental evidence which corroborates the effect of the various phenomena is also presented. These factors are (i) saturation of the hole population in the channel arising from dopant de-ionization in the charge sheet, (ii) parallel gate to source and drain current conduction arising from the physical structure of the device, and (iii) the effect of gate leakage on the non-equilibrium surface potential of the n–n heterojunction.

scholarly journals Temperature Dependent Analytical Model for the Threshold Voltage of the SiC VJFET with a Lateral Asymmetric Channel

Electronics ◽  
2021 ◽  
Vol 10 (12) ◽  
pp. 1494
Author(s):  
Sami Ghedira ◽  
Abdelaali Fargi ◽  
Kamel Besbes
Keyword(s):  
Analytical Model ◽  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistors ◽  
Electrical Potential ◽  
Wide Bandgap ◽  
Temperature Dependent ◽  
Lateral Channel ◽  
Source Voltage ◽  
Effect Transistor

The wide-bandgap (WBG) semiconductor devices for modern power electronics require intensive efforts for the analysis of the critical aspects of their operation. In recent years, silicon carbide (SiC) based field effect transistor have been extensively investigated. Motivated by the significant employment of the SiC Vertical Junction Field Effect transistors with lateral channel (LC-VJFET) in the development of high-voltage and high temperature applications, the properties of the LC-VJFET device are investigated in this work. The most important normally-ON LC-VJFET parameter is their threshold voltage (VTh), which is defined as the gate-to-source voltage necessary to block the device. The higher complexity of the blocking operation of the normally-ON device makes the accurate knowledge of the VTh as a fundamental issue. In this paper, a temperature dependent analytical model for the threshold voltage of the normally-ON LC-VJFET is developed. This analytical model is derived based on a numerical analysis of the electrical potential distribution along the asymmetrical lateral channel in the blocking operation. To validate our model, the analytical results are compared to 2D numerical simulations and experimental results for a wide temperature range.

2D Honeycomb Silicon: A Review on Theoretical Advances for Silicene Field-Effect Transistors

2020 ◽  
Vol 16 (4) ◽  
pp. 595-607 ◽  
Author(s):  
Mu Wen Chuan ◽  
Kien Liong Wong ◽  
Afiq Hamzah ◽  
Shahrizal Rusli ◽  
Nurul Ezaila Alias ◽  
...  
Keyword(s):  
Field Effect ◽  
Field Effect Transistors ◽  
Semiconductor Industry ◽  
Honeycomb Lattice ◽  
Theoretical Studies ◽  
Fabrication Technology ◽  
Dirac Cone ◽  
Free Standing ◽  
Silicene Nanoribbons ◽  
Effect Transistor

Catalysed by the success of mechanical exfoliated free-standing graphene, two dimensional (2D) semiconductor materials are successively an active area of research. Silicene is a monolayer of silicon (Si) atoms with a low-buckled honeycomb lattice possessing a Dirac cone and massless fermions in the band structure. Another advantage of silicene is its compatibility with the Silicon wafer fabrication technology. To effectively apply this 2D material in the semiconductor industry, it is important to carry out theoretical studies before proceeding to the next step. In this paper, an overview of silicene and silicene nanoribbons (SiNRs) is described. After that, the theoretical studies to engineer the bandgap of silicene are reviewed. Recent theoretical advancement on the applications of silicene for various field-effect transistor (FET) structures is also discussed. Theoretical studies of silicene have shown promising results for their application as FETs and the efforts to study the performance of bandgap-engineered silicene FET should continue to improve the device performance.

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