Multiple Regression Models for Compressive and Flexural Strength of Recycled Printed Circuit Board Concrete

Author(s):  
Pratiksha Dayabhai Muchhadiya ◽  
J.R. Pitroda ◽  
Rajesh Gujar ◽  
Jaykumar Soni
Author(s):  
Igor Nevliudov ◽  
Evgeny Razumov-Fryzyuk ◽  
Dmytro Nikitin ◽  
Danila Bliznyuk ◽  
Roman Strelets

The subject of research is the influence of factors of exposure of two-dimensional images on the topology of conductors in the manufacture of printed circuit boards by the method of three-dimensional polymer photomasks. The purpose of the work is ensuring the accuracy and preservation of the geometric dimensions of the conductors of printed circuit boards during LCD exposure of masks on the work piece. To achieve this goal, it is necessary to solve the following tasks: to analyze photolithography technology and types of polymer 3D printing; to develop a technological process for exposing photopolymer masks to a printed circuit board blank using 3D printing technologies; to conduct experimental studies to determine the optimal exposure parameters; on the basis of the empirical results obtained, to calculate the correlation coefficients of the factors for recall; to construct a linear regression model of the dependence of the deviations of the geometric dimensions of the printed conductors on the parameters of solutions for etching and exposure conditions. Results: The constructed regression models will become the basis for creating a software database that optimizes the initial images of the topology of printed conductors in the automated production of printed circuit boards. This will simplify the process of developing the topology of printed circuit boards, taking into account the real influence of the parameters of the technological operations of etching and exposure on the thickness of the tracks of the conductors of the printed circuit boards, which will reduce the proportion of rejects in the manufacture of single- and double-sided printed circuit boards. Conclusions: an LCD exposure technology and a method for studying the effects of exposure factors on the quality of printed circuit board topology are proposed, which provide sufficient empirical data to create regression models for calculating the influence of technological factors on the final dimensions of conductive paths in the production of printed circuit boards. Further development of the proposed technology will make it possible to manufacture rigid and flexible printed circuit boards completely, with conductive paths, a dielectric base, electronic elements that can be used in various devices.


2012 ◽  
Vol 132 (6) ◽  
pp. 404-410 ◽  
Author(s):  
Kenichi Nakayama ◽  
Kenichi Kagoshima ◽  
Shigeki Takeda

2014 ◽  
Vol 5 (1) ◽  
pp. 737-741
Author(s):  
Alejandro Dueñas Jiménez ◽  
Francisco Jiménez Hernández

Because of the high volume of processing, transmission, and information storage, electronic systems presently requires faster clock speeds tosynchronizethe integrated circuits. Presently the “speeds” on the connections of a printed circuit board (PCB) are in the order of the GHz. At these frequencies the behavior of the interconnects are more like that of a transmission line, and hence distortion, delay, and phase shift- effects caused by phenomena like cross talk, ringing and over shot are present and may be undesirable for the performance of a circuit or system.Some of these phrases were extracted from the chapter eight of book “2-D Electromagnetic Simulation of Passive Microstrip Circuits” from the corresponding author of this paper.


Author(s):  
Prabjit Singh ◽  
Ying Yu ◽  
Robert E. Davis

Abstract A land-grid array connector, electrically connecting an array of plated contact pads on a ceramic substrate chip carrier to plated contact pads on a printed circuit board (PCB), failed in a year after assembly due to time-delayed fracture of multiple C-shaped spring connectors. The land-grid-array connectors analyzed had arrays of connectors consisting of gold on nickel plated Be-Cu C-shaped springs in compression that made electrical connections between the pads on the ceramic substrates and the PCBs. Metallography, fractography and surface analyses revealed the root cause of the C-spring connector fracture to be plating solutions trapped in deep grain boundary grooves etched into the C-spring connectors during the pre-plating cleaning operation. The stress necessary for the stress corrosion cracking mechanism was provided by the C-spring connectors, in the land-grid array, being compressed between the ceramic substrate and the printed circuit board.


Author(s):  
William Ng ◽  
Kevin Weaver ◽  
Zachary Gemmill ◽  
Herve Deslandes ◽  
Rudolf Schlangen

Abstract This paper demonstrates the use of a real time lock-in thermography (LIT) system to non-destructively characterize thermal events prior to the failing of an integrated circuit (IC) device. A case study using a packaged IC mounted on printed circuit board (PCB) is presented. The result validated the failing model by observing the thermal signature on the package. Subsequent analysis from the backside of the IC identified a hot spot in internal circuitry sensitive to varying value of external discrete component (inductor) on PCB.


Author(s):  
Jun-Xian Fu ◽  
Shukri Souri ◽  
James S. Harris

Abstract Temperature and humidity dependent reliability analysis was performed based on a case study involving an indicator printed-circuit board with surface-mounted multiple-die red, green and blue light-emitting diode chips. Reported intermittent failures were investigated and the root cause was attributed to a non-optimized reflow process that resulted in micro-cracks and delaminations within the molding resin of the chips.


Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.


Author(s):  
O. Crépel ◽  
Y. Bouttement ◽  
P. Descamps ◽  
C. Goupil ◽  
P. Perdu ◽  
...  

Abstract We developed a system and a method to characterize the magnetic field induced by circuit board and electronic component, especially integrated inductor, with magnetic sensors. The different magnetic sensors are presented and several applications using this method are discussed. Particularly, in several semiconductor applications (e.g. Mobile phone), active dies are integrated with passive components. To minimize magnetic disturbance, arbitrary margin distances are used. We present a system to characterize precisely the magnetic emission to insure that the margin is sufficient and to reduce the size of the printed circuit board.


Author(s):  
Bhanu Sood ◽  
Diganta Das ◽  
Michael H. Azarian ◽  
Michael Pecht

Abstract Negative resistance drift in thick film chip resistors in high temperature and high humidity application conditions was investigated. This paper reports on the investigation of possible causes including formation of current leakage paths on the printed circuit board, delamination between the resistor protective coating and laser trim, and the possibility of silver migration or copper dendrite formation. Analysis was performed on a set of circuit boards exhibiting failures due to this phenomenon. Electrical tests after mechanical and chemical modifications showed that the drift was most likely caused by moisture ingress that created a conductive path across the laser trim.


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