scholarly journals Time-dependent plasticity in silicon microbeams mediated by dislocation nucleation

2020 ◽  
Vol 117 (29) ◽  
pp. 16864-16871 ◽  
Author(s):  
Mohamed Elhebeary ◽  
Tristan Harzer ◽  
Gerhard Dehm ◽  
M. Taher A. Saif
Keyword(s):  
High Temperatures ◽  
Threshold Stress ◽  
Mechanistic Model ◽  
High Stress ◽  
Single Crystal Silicon ◽  
Dislocation Nucleation ◽  
Crystal Silicon ◽  
Testing Stage ◽  
Scanning Transmission ◽  
Thermomechanical Testing

Understanding deformation mechanisms in silicon is critical for reliable design of miniaturized devices operating at high temperatures. Bulk silicon is brittle, but it becomes ductile at about 540 °C. It creeps (deforms plastically with time) at high temperatures (∼800 °C). However, the effect of small size on ductility and creep of silicon remains elusive. Here, we report that silicon at small scales may deform plastically with time at lower temperatures (400 °C) above a threshold stress. We achieve this stress by bending single-crystal silicon microbeams using an in situ thermomechanical testing stage. Small size, together with bending, localize high stress near the surface of the beam close to the anchor. This localization offers flaw tolerance, allowing ductility to win over fracture. Our combined scanning, transmission electron microscopy, and atomic force microscopy analysis reveals that as the threshold stress is approached, multiple dislocation nucleation sites appear simultaneously from the high-stressed surface of the beam with a uniform spacing of about 200 nm between them. Dislocations then emanate from these sites with time, lowering the stress while bending the beam plastically. This process continues until the effective shear stress drops and dislocation activities stop. A simple mechanistic model is presented to relate dislocation nucleation with plasticity in silicon.

HREM observation of dislocations near room temperature fractures in silicon

1988 ◽  
Vol 46 ◽  
pp. 892-893
Author(s):  
M. H. Rhee ◽  
W. A. Coghlan
Keyword(s):  
Cross Section ◽  
Room Temperature ◽  
Single Crystal Silicon ◽  
Dislocation Nucleation ◽  
Back Side ◽  
Ion Milling ◽  
Crystal Silicon ◽  
Flat Surfaces ◽  
Induced Fractures ◽  
Vicker’S Microhardness

Silicon is believed to be an almost perfectly brittle material with cleavage occurring on {111} planes. In such a material at room temperature cleavage is expected to occur prior to any dislocation nucleation. This behavior suggests that cleavage fracture may be used to produce usable flat surfaces. Attempts to show this have failed. Such fractures produced in semiconductor silicon tend to occur on planes of variable orientation resulting in surfaces with a poor surface finish. In order to learn more about the mechanisms involved in fracture of silicon we began a HREM study of hardness indent induced fractures in thin samples of oxidized silicon.Samples of single crystal silicon were oxidized in air for 100 hours at 1000°C. Two pieces of this material were glued together and 500 μm thick cross-section samples were cut from the combined piece. The cross-section samples were indented using a Vicker's microhardness tester to produce cracks. The cracks in the samples were preserved by thinning from the back side using a combination of mechanical grinding and ion milling.

Thermal Conductivity of Ultra Thin Single Crystal Silicon Layers: Part II — Experimental Data and Modeling at High Temperatures

2004 ◽  
Author(s):  
Wenjun Liu ◽  
Mehdi Asheghi ◽  
K. E. Goodson
Keyword(s):  
Experimental Data ◽  
Thermal Conductivity ◽  
Single Crystal ◽  
High Temperatures ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Silicon On Insulator ◽  
Boltzmann Transport ◽  
Crystal Silicon ◽  
Strained Si

Simulations of the temperature field in Silicon-on-Insulator (SOI) and strained-Si transistors can benefit from experimental data and modeling of the thin silicon layer thermal conductivity at high temperatures. This work presents the first experimental data for 20 and 100 nm thick single crystal silicon layers at high temperatures and develops algebraic expressions to account for the reduction in thermal conductivity due to the phonon-boundary scattering for pure and doped silicon layers. The model applies to temperatures range 300–1000 K for silicon layer thicknesses from 10 nm to 1 μm (and even bulk) and agrees well with the experimental data. In addition, the model has an excellent agreement with the predictions of thin film thermal conductivity based on thermal conductivity integral and Boltzmann transport equation, although it is significantly more robust and convenient for integration into device simulators. The experimental data and predictions are required for accurate thermal simulation of the semiconductor devices, nanostructures and in particular the SOI and strained-Si transistors.

scholarly journals A direct evidence of fatigue damage growth inside silicon MEMS structures obtained with EBIC technique

2014 ◽  
Vol 36 (2) ◽  
pp. 109-118
Author(s):  
Vu Le Huy ◽  
Shoji Kamiya
Keyword(s):  
Electron Microscope ◽  
Silicon Crystal ◽  
Single Crystal Silicon ◽  
Fatigue Loading ◽  
Scanning Transmission Electron Microscope ◽  
Crystal Silicon ◽  
Oxidation Layer ◽  
Analysis Technique ◽  
Defect Growth ◽  
Scanning Transmission

Electron beam induced current (EBIC) is a semiconductor analysis technique performed in a scanning electron microscope (SEM) or scanning transmission electron microscope (STEM). It is able to sense defects beneath the surface even invisible by SEM. This paper presents the results of a trial to observe the defect growth inside silicon MEMS structures under fatigue loading by applying EBIC technique. The tests were performed on two specimens fabricated from an n-type single crystal silicon wafer. While the test region of the specimens was repeatedly subjected to compressive stress, EBIC images were obtained to visualize damage evolution which presented by the growth of the dark region on EBIC images. It was proved that the damage is not due to the growth of oxidation layer on the surface of the specimens but due to the growth of intrinsic defects of silicon crystal. The results would be evidences to elucidate that the fatigue damages grow inside silicon MEMS structures but not in oxidation layer.

scholarly journals Fracture Toughness of Single Crystal Silicon at High Temperatures.

1992 ◽  
Vol 41 (463) ◽  
pp. 488-494 ◽  
Author(s):  
Kunio HAYASHI ◽  
Shinji TSUJIMOTO ◽  
Yasunori OKAMOTO ◽  
Tomozo NISHIKAWA
Keyword(s):  
Fracture Toughness ◽  
Single Crystal ◽  
High Temperatures ◽  
Single Crystal Silicon ◽  
Crystal Silicon

Stress-induced formation of structural defects on the {311} planes of silicon

1994 ◽  
Vol 9 (8) ◽  
pp. 2057-2065 ◽  
Author(s):  
Z. Weng-Sieh ◽  
P. Krulevitch ◽  
R. Gronsky ◽  
G.C. Johnson
Keyword(s):  
Three Dimensional ◽  
Single Crystal Silicon ◽  
Local Stress ◽  
High Resolution Electron Microscopy ◽  
Dislocation Nucleation ◽  
Silicon On Insulator ◽  
Structural Defects ◽  
Crystal Silicon ◽  
Resolution Electron ◽  
Silicon Silicon

Structural defects occurring on the {311} planes of single crystal silicon have been observed near the bottom oxide corner in silicon-on-insulator structures formed by selective epitaxial growth. These {311} defects exhibit a preferential orientation and are clustered near the silicon/silicon dioxide interface. This new observation provides an opportunity to study the mechanism of {311} defect generation in a system with discernible microstructure and stress state. High resolution electron microscopy combined with analytical and numerical three-dimensional stress modeling are used to show the dependence of these {311} defects on the local stress field, and to establish their origin in terms of a homogeneous dislocation nucleation model.

Dependence Of Silicon Fracture Strength And Surface Morphology On Deep Reactive Ion Etching Parameters

1998 ◽  
Vol 546 ◽  
Author(s):  
Kuo-Shen Chen ◽  
Arturo A. Ayon ◽  
Kevin A. Lohner ◽  
Mark A. Kepets ◽  
Terran K. Melconian ◽  
...  
Keyword(s):  
Mechanical Testing ◽  
Turbine Blades ◽  
Reactive Ion Etching ◽  
High Stress ◽  
Single Crystal Silicon ◽  
Sem Analysis ◽  
Material Strength ◽  
Crystal Silicon ◽  
Ion Etching ◽  
Deep Reactive Ion Etching

AbstractThe development of a high power-density micro-gas turbine engine is currently underway at MIT. The initial goal is to produce the components by deep reactive ion etching (DRIE) single crystal silicon. The capability of the silicon structures to withstand the very high stress levels within the engine limits the performance of the device. This capability is determined by the material strength and by the achievable fillet radii at the root of turbine blades and other etched features rotating at high speeds. These factors are strongly dependent on the DRIE parameters. Etching conditions that yield large fillet radii and good surface quality are desirable from a mechanical standpoint. In order to identify optimal DRIE conditions, a mechanical testing program has been implemented. The designed experiment involves a matrix of 55 silicon wafers with radiused hub flexure specimens etched under different DRIE conditions. The resulting fracture strengths were determined through mechanical testing, while SEM analysis was used to characterize the corresponding fillet radii. The test results will provide the basis for process optimization of micro-turbomachinery fabrication and play an important role in the overall engine redesign.

Analysis of Silicon-On-Insulator Structures Formed By Oxygen Ion Implantation

1985 ◽  
Vol 43 ◽  
pp. 300-301
Author(s):  
N. Lewis ◽  
E. L. Hall ◽  
A. Mogro-Campero ◽  
R. P. Love
Keyword(s):  
Ion Implantation ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
High Dose ◽  
Crystal Silicon ◽  
Oxygen Ion ◽  
Oxygen Ion Implantation

The formation of buried oxide structures in single crystal silicon by high-dose oxygen ion implantation has received considerable attention recently for applications in advanced electronic device fabrication. This process is performed in a vacuum, and under the proper implantation conditions results in a silicon-on-insulator (SOI) structure with a top single crystal silicon layer on an amorphous silicon dioxide layer. The top Si layer has the same orientation as the silicon substrate. The quality of the outermost portion of the Si top layer is important in device fabrication since it either can be used directly to build devices, or epitaxial Si may be grown on this layer. Therefore, careful characterization of the results of the ion implantation process is essential.

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