Analytical study and simulation of a transformer-less photovoltaic grid-connected inverter with a delta-type tri-direction clamping cell for leakage current elimination

2018 ◽  
Vol 37 (2) ◽  
pp. 814-831 ◽  
Author(s):  
Tohid Jalilzadeh ◽  
Mehrdad Tarafdar Hagh ◽  
Mehran Sabahi
Keyword(s):  
Power Systems ◽  
Leakage Current ◽  
Control Method ◽  
Harmonic Distortion ◽  
Common Mode ◽  
Content Type ◽  
Low Leakage ◽  
Common Mode Voltage ◽  
Power Switches ◽  
The Common

PurposeThis paper aims to propose a new transformer-less inverter structure to reduce the common-mode leakage current in grid-connected photovoltaic (PV) systems. Design/methodology/approachThe proposed circuit structure is the same as the conventional full-bridge inverter with three additional power switches in a triangular structure. These three power switches are between the bridge and the output filter, and they mitigate the common-mode leakage current flowing toward the PV panels’ capacitors. The common-mode leakage current mitigation is done through the three-direction clamping cell (TDCC) concept. By clamping the common-mode voltage to the middle voltage of the DC-link capacitors, the leakage current and the total harmonic distortion (THD) of the injected current to the grid is effectively reduced. Therefore, the efficiency is improved. FindingsThe switching modes and the control method are introduced. A comparison is carried out between the proposed structure and other solutions in the literature. The proposed topology and its respective control method are simulated by PSCAD/EMTDC software. The simulation results validate the advantages of the presented structure such as clamping the common-mode voltage and reducing leakage current and THD of injected current to the grid. Originality/valuePresenting a single phase-improved inverter structure with low-leakage current for grid-connected PV power systems represents a significant original contribution to this work. The proposed structure can inject a sinusoidal current with low THD to the AC grid, and the power factor is unity on the AC side. In the half positive cycle, one of the switches in the TDCC is turned off under zero current. Besides, one of the other switches in TDCC is turned on with zero voltage and, therefore, its turn-on switching losses are zero. The efficiency of the proposed topology is high because of the reduction of leakage current and power losses. Accordingly, the presented topology can be a good solution to the leakage current elimination.

scholarly journals Leakage Current Reduction in Single-Phase Grid-Connected Inverters—A Review

2020 ◽  
Vol 10 (7) ◽  
pp. 2384 ◽  
Author(s):  
Adyr A. Estévez-Bén ◽  
Alfredo Alvarez-Diazcomas ◽  
Gonzalo Macias-Bobadilla ◽  
Juvenal Rodríguez-Reséndiz
Keyword(s):  
Leakage Current ◽  
Harmonic Distortion ◽  
Clean Energy ◽  
Photovoltaic Module ◽  
Common Mode ◽  
Advantages And Disadvantages ◽  
Common Mode Voltage ◽  
The Common ◽  
Ac Converters ◽  
Current Reduction

The rise in renewable energy has increased the use of DC/AC converters, which transform the direct current to alternating current. These devices, generally called inverters, are mainly used as an interface between clean energy and the grid. It is estimated that 21% of the global electricity generation capacity from renewable sources is supplied by photovoltaic systems. In these systems, a transformer to ensure grid isolation is used. Nevertheless, the transformer makes the system expensive, heavy, bulky and reduces its efficiency. Therefore, transformerless schemes are used to eliminate the mentioned disadvantages. One of the main drawbacks of transformerless topologies is the presence of a leakage current between the physical earth of the grid and the parasitic capacitances of the photovoltaic module terminals. The leakage current depends on the value of the parasitic capacitances of the panel and the common-mode voltage. At the same time, the common-mode voltage depends on the modulation strategy used. Therefore, by the manipulation of the modulation technique, is accomplished a decrease in the leakage current. However, the connection standards for photovoltaic inverters establish a maximum total harmonic distortion of 5%. In this paper an analysis of the common-mode voltage and its influence on the value of the leakage current is described. The main topologies and strategies used to reduce the leakage current in transformerless schemes are summarized, highlighting advantages and disadvantages and establishing points of comparison with similar topologies. A comparative table with the most important aspects of each converter is shown based on number of components, modes of operation, type of modulation strategy used, and the leakage current value obtained. It is important to mention that analyzed topologies present a variation of the leakage current between 0 to 180 mA. Finally, the trends, problems, and researches on transformerless grid-connected PV systems are discussed.

scholarly journals A New Approach to the PWM Modulation for the Multiphase Matrix Converters Supplying Loads with Open-End Winding

Energies ◽  
2021 ◽  
Vol 14 (2) ◽  
pp. 466
Author(s):  
Pawel Szczepankowski ◽  
Natalia Strzelecka ◽  
Enrique Romero-Cadaval
Keyword(s):  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Simulation Software ◽  
Common Mode ◽  
New Approach ◽  
Matrix Converters ◽  
Load Voltage ◽  
Common Mode Voltage ◽  
The Common ◽  
Open End Winding

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.

scholarly journals An Efficient H7 Single-Phase Photovoltaic Grid Connected Inverter for CMC Conceptualization and Mitigation Method

Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1440 ◽  
Author(s):  
Mehrdad Mahmoudian ◽  
Eduardo M. G. Rodrigues ◽  
Edris Pouresmaeil
Keyword(s):  
Leakage Current ◽  
Single Phase ◽  
Pulse Width Modulation ◽  
Reactive Power ◽  
Negative Impact ◽  
Harmonic Distortion ◽  
Common Mode ◽  
Safety Issues ◽  
Common Mode Voltage ◽  
Circuit Components

Transformerless inverters are the economic choice as power interfaces between photovoltaic (PV) renewable sources and the power grid. Without galvanic isolation and adequate power convert design, single-phase grid connected inverters may have limited performance due to the presence of a significant common mode ground current by creating safety issues and enhancing the negative impact of harmonics in the grid current. This paper proposes an extended H6 transformerless inverter that uses an additional power switch (H7) to improve common mode leakage current mitigation in a single-phase utility grid. The switch with a diode in series connection aims to make an effective clamp of common mode voltage at the DC link midpoint. The principles of operation of the proposed structure with bipolar sinusoidal pulse width modulation (SPWM) is presented and formulated. Laboratory tests’ performance is detailed and evaluated in comparison with well-known single-phase transformer-less topologies in terms of power conversion efficiency, total harmonic distortion (THD) level, and circuit components number. The studied topology performance evaluation is completed with the inclusion of reactive power compensation functionality verified by a low-power laboratory implementation with 98.02% efficiency and 30.3 mA for the leakage current.

scholarly journals A Five-Level Converter in a Three-Level Mode for Common-Mode Leakage Current Suppression in PV-Generation Systems

Electronics ◽  
2021 ◽  
Vol 10 (19) ◽  
pp. 2382
Author(s):  
Aleksey V. Udovichenko ◽  
Sergey V. Brovanov ◽  
Evgeny V. Grishanov ◽  
Svetlana M. Stennikova
Keyword(s):  
Leakage Current ◽  
Pulse Width Modulation ◽  
Renewable Energy Sources ◽  
Multilevel Converter ◽  
Generation System ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Modulation Mode ◽  
The Common ◽  
Pv Generation

Power generation systems (PGSs) based on renewable energy sources are finding ever-widening applications, and many researchers work on this problem. Many papers address the problem of transformerless PGSs, but few of them aimed at conducting research on structures with multilevel converter topologies as part of a PGS. In this paper a grid-tied transformerless PV-generation system based on a multilevel converter is discussed. There are common-mode leakage currents (CMLCs), which act as a parasitic factor. It is also known that common-mode voltage is the main cause of the common-mode leakage current in grid-tied PV-generation systems. This paper considers the space vector pulse-width modulation (PWM) technique, which is used to suppress or reduce common-mode leakage current. The proposed PWM technique with the reduction of common-mode leakage current for a generation system based on the multilevel converter controlled with a PWM technique was verified experimentally. The experimental results accurately confirmed the mathematical model and the compensation achieved without errors. In the experiment, there was an approximately six-fold decrease in the common-mode leakage current (10.3 mA in rejection mode and 61 mA in non-rejection current). This can lead to the elimination of CMLC in a multilevel semiconductor converter only by changing the modulation mode. This suggests the possibility of using these devices as part of transformerless generation systems. Suppression of CMLC can only be carried out by changing the PWM algorithm. Both considered topologies can implement this mode of operation. The proposed converter has a higher efficiency up to a frequency multiplicity of 2000.

scholarly journals Carrier-Based Common Mode Voltage Control Techniques in Three-Level Diode-Clamped Inverter

2012 ◽  
Vol 2012 ◽  
pp. 1-12 ◽  
Author(s):  
Pradyumn Chaturvedi ◽  
Shailendra Jain ◽  
Pramod Agarwal
Keyword(s):  
Output Voltage ◽  
Harmonic Distortion ◽  
Comparison Method ◽  
Rate Of Change ◽  
Common Mode ◽  
Multilevel Inverters ◽  
Common Mode Voltage ◽  
Voltage Signal ◽  
Comparable Performance ◽  
The Common

Switching converters are used in electric drive applications to produce variable voltage, variable frequency supply which generates harmful large dv/dt and high-frequency common mode voltages (CMV). Multilevel inverters generate lower CMV as compared to conventional two-level inverters. This paper presents simple carrier-based technique to control the common mode voltages in multilevel inverters using different structures of sine-triangle comparison method such as phase disposition (PD), phase opposition disposition (POD) by adding common mode voltage offset signal to actual reference voltage signal. This paper also presented the method to optimize the magnitude of this offset signal to reduce CMV and total harmonic distortion in inverter output voltage. The presented techniques give comparable performance as obtained in complex space vector-based control strategy, in terms of number of commutations, magnitude, and rate of change of CMV and harmonic profile of inverter output voltage. Simulation and experimental results presented confirm the effectiveness of the proposed techniques to control the common mode voltages.

scholarly journals An Impedance Source Multi-Level Three Phase Inverter with Common Mode Voltage Elimination and Dead Time Compensation

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1639
Author(s):  
Mehrdad Mahmoudian ◽  
Maziyar Fakhraei ◽  
Edris Pouresmaeil ◽  
Eduardo M. G. Rodrigues
Keyword(s):  
High Efficiency ◽  
Dead Time ◽  
Harmonic Distortion ◽  
Common Mode ◽  
Current Harmonics ◽  
Pulse Width Modulated ◽  
Switching Algorithm ◽  
Common Mode Voltage ◽  
Power Switches ◽  
Drive Systems

Currently, most electro-mechanical drive systems that require speed control use pulse-width modulated (PWM) variable frequency drives known as adjustable speed drives (ASD). The high switching speeds of the electronics switches are essential for proper operation of the ASD. Common mode voltage (CMV) has its origin in the PWM switching. The CMV increases the stress on the coils and windings, reduces the life of the bearing and, therefore, has a significant impact on motor life cycle. In this paper, a variant of a PWM-based space vector modulation (SVPWM) switching algorithm is proposed to control both the shoot-through intervals and the dead time of the power switches that could be compensated. The proposed algorithm is implemented on a platform consisting of an impedance source network in the DC side of the topology with the purpose of mitigating the CMV and capability of voltage boosting. Since similar methods have achieved a CMV reduction of 1/6 of the DC link voltage so far, in this paper, while surpassing the disturbing current harmonics, the high efficiency is fully accessible. The presented experimental results verify the effectiveness of the proposed approach by slightly increasing the total harmonic distortion (THD) and reducing the converter losses.

scholarly journals A Low-Distortion 20 GS/s Four-Channel Time-Interleaved Sample-and-Hold Amplifier in 0.18 μm SiGe BiCMOS

Electronics ◽  
2019 ◽  
Vol 9 (1) ◽  
pp. 20
Author(s):  
Hao Ding ◽  
Danyu Wu ◽  
Xuqiang Zheng ◽  
Lei Zhou ◽  
Teng Chen ◽  
...  
Keyword(s):  
High Speed ◽  
Sampling Rate ◽  
Harmonic Distortion ◽  
Large Area ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Sample And Hold ◽  
Sige Bicmos ◽  
The Common ◽  
Time Interleaved

This paper presents a 20 GS/s four-channel time-interleaved sample-and-hold amplifier (SHA), which aims to improve the harmonic distortion performance, eliminate the common-mode voltage fall in track-to-hold transition, and solve the difficulty of timing mismatch calibration among different sampling channels. In data path, the harmonic distortion of the track-hold switch is optimized by introducing a distortion-improving resistor into the switched emitter follower. The common-mode voltage fall is eliminated by an inserted delay-regulating resistor. Additionally, broadband data buffers are utilized to further guarantee a wide bandwidth. In clock path, an interpolator-based phase regulator in analog domain is implemented to calibrate the timing mismatch, hence avoiding the large area cost and complicated algorithm in the digital domain. Fabricated in a 0.18 μm SiGe BiCMOS process, the experimental results show that the SHA achieves a bandwidth of 16 GHz and a total harmonic distortion of −39.6 to approximately −51.8 dB with a −3 dBm input. By applying the proposed sampling phase regulator, the timing mismatch can be optimized to satisfy the requirement of 6-bit resolution at a 4 × 5 GS/s sampling rate. The proposed SHA shows prominent performance on both bandwidth and linearity, which makes it suitable for ultra-high-speed communication networks.

scholarly journals A Novel Power Electronic Inverter Circuit for Transformerless Photovoltaic Systems

2014 ◽  
Vol 2014 ◽  
pp. 1-5 ◽  
Author(s):  
Cao Hai-Yan
Keyword(s):  
Leakage Current ◽  
Photovoltaic Systems ◽  
Power Electronic ◽  
Test Results ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Evaluation Test ◽  
Mode Characteristic ◽  
The Common ◽  
Inverter Circuit

Capacitive leakage current is one of the most important issues for transformerless photovoltaic systems. In order to deal with the capacitive leakage current, a new power electronic inverter circuit is proposed in this paper. The inverter circuit consists of six switches and operates with constant common mode voltage. Theoretical analysis is conducted to clarify the circuit operation principle and the common mode characteristic. The performance evaluation test is carried out, and test results demonstrate that the capacitive leakage current can be significantly minimized with the proposed power electronic inverter circuit.

scholarly journals Research on an Improved Single-Phase Unisolated Grid-Connected Photovoltaic Inverter

2021 ◽  
Vol 23 (2) ◽  
pp. 123-130
Author(s):  
Baoge Zhang ◽  
Deyu Hong
Keyword(s):  
Leakage Current ◽  
Single Phase ◽  
Current Problem ◽  
Input Voltage ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Voltage Clamping ◽  
The Common ◽  
Simulation Results ◽  
Inverter Topology

An improved single-phase unisolated grid-connected photovoltaic inverter topology is proposed to solve the common mode leakage current problem of unisolated grid-connected photovoltaic inverters. By analyzing the topology structure and voltage clamping principle of the improved inverter, the topology can maintain the same low input voltage as the full-bridge inverter, and ensure that the common-mode voltage in the continuation mode is clamped to the midpoint voltage of the bus, so as to effectively reduce the common-mode leakage current caused by the common-mode voltage suspension in the continuation mode. Moreover, the common-mode leakage current of the improved topology is smaller than that of the traditional H6-2D topology at similar conversion efficiency. The simulation results on MATLAB /Simulink platform show that the topology is feasible and effective.

scholarly journals A Novel Inverter Topology for Single-Phase Transformerless PV System

2016 ◽  
Vol 2016 ◽  
pp. 1-6
Author(s):  
Haiyan Cao
Keyword(s):  
Leakage Current ◽  
Single Phase ◽  
High Efficiency ◽  
Low Cost ◽  
Experimental Tests ◽  
Pv System ◽  
Common Mode ◽  
Common Mode Voltage ◽  
The Common ◽  
Inverter Topology

Transformerless photovoltaic (PV) power system is very promising due to its low cost, small size, and high efficiency. One of its most important issues is how to prevent the common mode leakage current. In order to solve the problem, a new inverter is proposed in this paper. The system common mode model is established, and the four operation modes of the inverter are analyzed. It reveals that the common mode voltage can be kept constant, and consequently the leakage current can be suppressed. Finally, the experimental tests are conducted. The experimental results verify the effectiveness of the proposed solution.

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