Development of assembly techniques for connection of AlGaN/GaN/Si chips to DBC substrate

Circuit World ◽  
2020 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Ryszard Kisiel ◽  
Marek Guziewicz ◽  
Andrzej Taube ◽  
Maciej Kaminski ◽  
Mariusz Sochacki
Keyword(s):  
Surface Condition ◽  
Diffraction Method ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
X Ray Diffraction ◽  
Content Type ◽  
Lower Temperature ◽  
Gan On Si ◽  
Solid Liquid ◽  
Metal Layers

Purpose This paper aims to investigate the sintering and solid liquid interdiffusion bonding (SLID) techniques to attach AlGaN/GaN-on-Si chips to direct bond copper (DBC) substrate. The influence of metal layers deposited on the backside of AlGaN/GaN-on-Si dies on the assembly process is also investigated. Design/methodology/approach The authors assumed the value of the shear strength to be a basic parameter for evaluation of mechanical properties. Additionally, the surface condition after shearing was assessed by SEM photographs and the shear surface was studied by X-ray diffraction method. The SLID requires Sn-plated DBC substrate and can be carried out at temperature slightly higher than 250°C and pressure reduced to 4 MPa, while the sintering requires process temperature of 350°C and the pressure at least 7.5 MPa. Findings Ag-, Au-backside covered high electron mobility transistor (HEMT) chips can be assembled on Sn-plated DBC substrates by SLID technology. In case of sintering technology, Cu- or Ag-backside covered HEMT chips can be assembled on Ag- or Ni/Au-plated DBC substrates. The SLID process can be realized at lower temperature and decreased pressure than sintering process. Research limitations/implications For SLID technology, the adhesion between Cu-backside covered HEMT die and DBC with Sn layer loses its operational properties after short-term ageing in air at temperature of 300°C. Originality/value In the SLID process, Sn-Cu and Sn-Ag intermetallic compounds and alloys are responsible for creation of the joint between Sn-plated DBC and micropowder Ag layer, while the sintered joint between the chip and Ag-based micropowder is formed in diffusion process.

scholarly journals Millimeter-wave GaN-based HEMT development at ETH-Zürich

2010 ◽  
Vol 2 (1) ◽  
pp. 33-38 ◽  
Author(s):  
Haifeng Sun ◽  
Diego Marti ◽  
Stefano Tirelli ◽  
Andreas R. Alt ◽  
Hansruedi Benedickter ◽  
...  
Keyword(s):  
Millimeter Wave ◽  
High Speed ◽  
Low Cost ◽  
High Electron Mobility Transistor ◽  
High Resistivity ◽  
High Electron ◽  
Cutoff Frequencies ◽  
Gan Hemts ◽  
The Difference ◽  
Gan On Si

We review the AlGaN/GaN high electron mobility transistor (HEMT) activities in the Millimeter-Wave Electronics Group at ETH-Zürich. Our group's main thrust in the AlGaN/GaN arena is the extension of device bandwidth to higher frequency bands. We demonstrated surprising performances for AlGaN/GaN HEMTs grown on high-resistivity (HR) silicon (111) substrates, and extended cutoff frequencies of 100 nm gate devices well into the millimeter (mm)-wave domain. Our results narrow the performance gap between GaN-on-SiC (or sapphire) and GaN-on-silicon and establish GaN-on-Si as a viable technology for low-cost mm-wave electronics. We here contrast the difference in behaviors observed in our laboratory between nominally identical devices built on high-resistivity silicon (HR-Si) and on sapphire substrates; we show high-speed devices with high-cutoff frequencies and breakdown voltages which combine fT,MAX × BV products as high as 5–10 THz V, and show AlGaN/GaN HEMTs with fT values exceeding 100 GHz on HR-Si. Although the bulk of our activities have so far focused on AlGaN/GaN HEMTs on HR-Si, our process produces excellent device performances when applied to GaN HEMTs on SiC as well: 100 nm gate transistors with fT > 125 GHz have been realized at ETH-Zürich.

scholarly journals Influence of Oxygen–Plasma Treatment on In-Situ SiN/AlGaN/GaN MOSHEMT with PECVD SiO2 Gate Insulator

Materials ◽  
2019 ◽  
Vol 12 (23) ◽  
pp. 3968
Author(s):  
Cho ◽  
Cha ◽  
Kim
Keyword(s):  
Plasma Treatment ◽  
Oxygen Plasma ◽  
Surface Condition ◽  
Chemical Vapor ◽  
High Electron Mobility Transistor ◽  
Gate Insulator ◽  
Oxygen Plasma Treatment ◽  
High Electron ◽  
Threshold Voltage Shift

The influence of oxygen–plasma treatment on in situ SiN/AlGaN/GaN MOS high electron mobility transistor with SiO2 gate insulator was investigated. Oxygen–plasma treatment was performed on in situ SiN, before SiO2 gate insulator was deposited by plasma-enhanced chemical vapor deposition (PECVD). DC I-V characteristics were not changed by oxygen plasma treatment. However, pulsed I-V characteristics were improved, showing less dispersion compared to non-treated devices. During short-term gate bias stress, the threshold voltage shift was also smaller in a treated device than in an untreated one. X-ray photoemission spectroscopy also revealed that SiO2 on in situ SiN with oxygen–plasma treatment has an O/Si ratio close to the theoretical value. This suggests that the oxygen plasma treatment-modified surface condition of the SiN layer is favorable to SiO2 formation by PECVD.

Robust 600 V GaN high electron mobility transistor technology on GaN-on-Si with 400 V, 5 µs load-short-circuit withstand capability

2016 ◽  
Vol 55 (4S) ◽  
pp. 04EG01 ◽  
Author(s):  
Tetsuzo Nagahisa ◽  
Hisao Ichijoh ◽  
Takamitsu Suzuki ◽  
Alex Yudin ◽  
Alberto O. Adan ◽  
...  
Keyword(s):  
Electron Mobility ◽  
Short Circuit ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
High Electron Mobility ◽  
Gan On Si

Crack-free III-nitride structures (> 3.5 μm) on silicon

2011 ◽  
Vol 1324 ◽  
Author(s):  
Mihir Tungare ◽  
Jeffrey M. Leathersich ◽  
Neeraj Tripathi ◽  
Puneet Suvarna ◽  
Fatemeh (Shadi) Shahedipour-Sandvik ◽  
...  
Keyword(s):  
Chemical Vapor ◽  
High Electron Mobility Transistor ◽  
Poor Quality ◽  
Organic Chemical ◽  
High Electron ◽  
Large Area ◽  
Si Substrates ◽  
Substrate Engineering ◽  
Gan On Si

ABSTRACTIII-nitride structures on Si are of great technological importance due to the availability of large area, epi ready Si substrates and the ability to heterointegrate with mature silicon micro and nanoelectronics. High voltage, high power density, and high frequency attributes of GaN make the III-N on Si platform the most promising technology for next-generation power devices. However, the large lattice and thermal mismatch between GaN and Si (111) introduces a large density of dislocations and cracks in the epilayer. Cracking occurs along three equivalent {1−100} planes which limits the useable device area. Hence, efforts to obtain crack-free GaN on Si have been put forth with the most commonly reported technique being the insertion of low temperature (LT) AlN interlayers. However, these layers tend to further degrade the quality of the devices due to the poor quality of films grown at a lower temperature using metal organic chemical vapor deposition (MOCVD). Our substrate engineering technique shows a considerable improvement in the quality of 2 μm thick GaN on Si (111), with a simultaneous decrease in dislocations and cracks. Dislocation reduction by an order of magnitude and crack separation of > 1 mm has been achieved. Here we combine our method with step-graded AlGaN layers and LT AlN interlayers to obtain crack-free structures greater than 3.5 μm on 2” Si (111) substrates. A comparison of these film stacks before and after substrate engineering is done using atomic force microscopy (AFM) and optical microscopy. High electron mobility transistor (HEMT) devices developed on a systematic set of samples are tested to understand the effects of our technique in combination with crack reduction techniques. Although there is degradation in the quality upon the insertion of LT AlN interlayers, this degradation is less prominent in the stack grown on the engineered substrates. Also, this methodology enables a crack-free surface with the capability of growing thicker layers.

Effect of device geometry on static and dynamic performance of AlGaN/GaN-on-Si high electron mobility transistor

2016 ◽  
Vol 3 (8) ◽  
pp. 085013
Author(s):  
Jin-Shan Shi ◽  
Hong-Fan Huang ◽  
Xiao-Yong Liu ◽  
Sheng-Xun Zhao ◽  
Lin-Qing Zhang ◽  
...  
Keyword(s):  
Electron Mobility ◽  
Dynamic Performance ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
High Electron Mobility ◽  
Device Geometry ◽  
Gan On Si

Oxidation of thiophene over copper-manganese mixed oxides

2009 ◽  
Vol 63 (2) ◽  
Author(s):  
Małgorzata Szynkowska ◽  
Aneta Węglińska ◽  
Elżbieta Wojciechowska ◽  
Tadeusz Paryjczak
Keyword(s):  
Noble Metals ◽  
Mixed Oxides ◽  
Diffraction Method ◽  
Catalytic Performance ◽  
X Ray Diffraction ◽  
X Ray ◽  
Copper Manganese ◽  
Different Temperatures ◽  
Temperature Programmed ◽  
Lower Temperature

AbstractCommercial hopcalite calcined at different temperatures and hopcalite modified with noble metals (Pt, Pd, and Au) were studied in oxidation of thiophene. Surface and bulk properties of catalysts were studied using temperature-programmed reduction (TPRH2), X-ray diffraction method (XRD) and thermal analysis (TG-DTA-MS). It was shown that calcined samples displayed higher activity in comparison with commercial untreated hopcalite; however, a lower temperature of calcination was favourable. High temperature of thermal treatment induced an increase in the crystallinity and a decrease in the surface area of the samples, and, as a consequence, the loss of catalysts activity. Moreover, marked improvement in the catalytic performance of platinum and palladium modified catalysts in relation to base hopcalite was observed. The obtained results indicate that the higher activity of samples containing Pt and Pd was accompanied by better reducibility of the catalysts.

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