High-density high-reliability tungsten interconnection by filled interconnect groove metallization

1988 ◽  
Vol 35 (7) ◽  
pp. 952-956 ◽  
Author(s):  
E.K. Broadbent ◽  
J.M. Flanner ◽  
W.G.M. Van den Hoek
Electronics ◽  
2021 ◽  
Vol 10 (7) ◽  
pp. 792
Author(s):  
Yeongkyo Seo ◽  
Kon-Woo Kwon

This paper presents area optimization techniques for high-density spin-orbit torque magnetic random-access memories (SOT-MRAMs). Although SOT-MRAM has many desirable features of nonvolatility, high reliability and low write energy, it poses challenges to high-density memory implementation because of the use of two access transistors per cell. We first analyze the layout of the conventional SOT-MRAM bit-cell that includes two vertical metal lines, a bit-line and a source-line, limiting the horizontal dimension. We further propose two design techniques to reduce the horizontal dimension by decreasing the number of metal lines per cell without any performance overhead. Based on the fact that adjacent columns in a bit-interleaved array are not simultaneously accessed, the proposed techniques share a single source-line between two consecutive bit-cells in the same row. The simulation result shows that proposed techniques can achieve a bit-cell area reduction of 10–25% compared to the conventional SOT-MRAM. The comparison of our proposed designs with the standard spin-transfer torque MRAM shows 45% lower write energy, 84% lower read energy, and 2.3 × higher read-disturb margin.


1990 ◽  
Vol 14 (2) ◽  
pp. 95-109
Author(s):  
J. N. Avaritsiotis ◽  
G. Eleftheriades

Thermal analysis during the design process is an essential step towards the achievement of high reliability in modern high density hybrid and integrated circuits. Thermal analysis is also essential for modern, high density PCBs. Traditionally, a solution of the thermal problem is obtained by either the method of finite differences or the method of finite elements. Both methods, however, require a fine 3-D partition of the substrate, leading to large systems of linear equations the solution of which demands substantial computing power provided by number crunching machines and/or powerful computer work-stations.The widespread use of personal computers, however, dictates the development of new approaches to the thermal problems so that a design engineer can solve them in reasonable time with a PC. A new treatment of steady-state thermal analysis combined with a layout editor is proposed in this paper, which makes use of the analytical solution for the temperature distribution in a single-layer substrate with heat sources on the surface, and having an isothermal bottom surface. In this way the mathematical complexity of the problem is dramatically reduced allowing the thermal analysis of Multi Chip Modules (M.C.M.s) and complex hybrid circuits with the use of a PC/XT or compatible.


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