Dual Gate oxide reliability improved by Spacer and Salicide process optimisation

2008 ◽  
Author(s):  
G. Richou ◽  
D. Ottenwaelder ◽  
J.L. Baltzinger ◽  
B. Delahaye ◽  
F. Domart ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Process Optimisation ◽  
Oxide Reliability ◽  
Dual Gate

Impact of boron penetration on gate oxide reliability and device performance in a dual-gate oxide process

2000 ◽  
Author(s):  
Yunqiang Zhang ◽  
Chock H. Gan ◽  
Xi Li ◽  
James Lee ◽  
David Vigar ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Device Performance ◽  
Oxide Reliability ◽  
Dual Gate ◽  
Boron Penetration

Exploration of heavy ion irradiation effects on gate oxide reliability in power MOSFETs

1995 ◽  
Vol 35 (3) ◽  
pp. 603-608 ◽  
Author(s):  
S.R. Anderson ◽  
R.D. Schrimpf ◽  
K.F. Galloway ◽  
J.L. Titus
Keyword(s):  
Ion Irradiation ◽  
Gate Oxide ◽  
Heavy Ion ◽  
Irradiation Effects ◽  
Power Mosfets ◽  
Heavy Ion Irradiation ◽  
Oxide Reliability

The impact of F contamination induced by the process on the gate oxide reliability

1998 ◽  
Vol 38 (2) ◽  
pp. 255-258 ◽  
Author(s):  
G Ghidini ◽  
C Clementi ◽  
D Drera ◽  
F Maugain
Keyword(s):  
Gate Oxide ◽  
Oxide Reliability ◽  
The Impact

Impacts of Area-Dependent Defects on the Yield and Gate Oxide Reliability of SiC Power MOSFETs

2021 ◽  
Author(s):  
Tianshi Liu ◽  
Shengnan Zhu ◽  
Michael Jin ◽  
Limeng Shi ◽  
Marvin H. White ◽  
...  
Keyword(s):  
Gate Oxide ◽  
Power Mosfets ◽  
Oxide Reliability

Process Optimisation for 4H-SiC MOSFET Applications

2006 ◽  
Vol 527-529 ◽  
pp. 1051-1054 ◽  
Author(s):  
Caroline Blanc ◽  
Dominique Tournier ◽  
Phillippe Godignon ◽  
D.J. Brink ◽  
Véronique Soulière ◽  
...  
Keyword(s):  
Field Effect ◽  
Oxidation Process ◽  
Gate Oxide ◽  
Process Optimisation ◽  
Field Effect Mobility ◽  
Oxide Formation ◽  
Step Procedure ◽  
P Type ◽  
Peak Value ◽  
Gas Precursor

We report on 4H-SiC MOSFET devices implemented on p-type <11-20>-oriented epitaxial layers, using a two-step procedure for gate oxide formation. First is a thin, dry, thermal SiO2 layer grown at 1050°C for 1 hour. Next, is a thick (50 nm) layer of complementary oxide deposited by PECVD using TEOS as gas precursor. With respect to the standard thermal oxidation process, this results in much improvement of the field effect mobility. For the best samples, we find a peak value in the range of 330 cm2/Vs while, on the full wafer, an average mobility of about 160 cm2/Vs is found. Up to now, this is one of the best results ever reported for 4H-SiC MOSFETs.

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