A high gain low offset amplifier with rail-to-rail inputs

2006 ◽  
Author(s):  
Wu Xiaobo Zhang Zhiying
Keyword(s):  
High Gain ◽  
Rail To Rail ◽  
Low Offset

A High-gain Low-offset Baseband Design for Multi-Standard Navigation Receivers

2021 ◽  
Author(s):  
Jeffin Joy ◽  
Swetha Clara Jose ◽  
Vijaya Kumar Kanchetla ◽  
Shubham Jain ◽  
Rajesh Zele
Keyword(s):  
High Gain ◽  
Low Offset

A New Architecture of LCD Driver of Rail-to-Rail Buffer with High Gain Wide Range

2010 ◽  
Vol 97-101 ◽  
pp. 3765-3768
Author(s):  
Shih Han Lin ◽  
Shu Jung Chen ◽  
Chih Hsiung Shen
Keyword(s):  
High Speed ◽  
High Gain ◽  
Driving Ability ◽  
Fully Differential ◽  
Rail To Rail ◽  
Wide Range ◽  
Lcd Driver ◽  
Additional Circuitry ◽  
Differential Pair ◽  
The Impact

A new modified CMOS buffer amplifier with rail-to-rail input and output range is proposed by TSMC 0.35μm 2P4M process at 3.3V supply. The technique adds dummy pairs to sense the common mode range of the input differential pair and adjusts the output current accordingly. The amplifier provides high gain for a wider range of output voltages. Design considerations for reducing the impact of the additional circuitry on the core are provided. The technique described can be adapted for use with traditional fully-differential rail-to-rail amplifiers, which performs 86.9dB ~92dB dc gain, 15 MHz unit-gain bandwidth, high driving ability with high slew rate under a 100pF capacitance and a 3kΩ series resistance loading. The simulation results indicate that the settling times of rising and falling edge are within 3.5μs. It is effective for a high resolution and high speed LCD driver.

scholarly journals A Low-Power, High-Gain Amplifier with Rail-to-Rail Operating Capability: Applications to Biomedical Signal Processing

2021 ◽  
Vol 58 (1) ◽  
pp. 71-76
Author(s):  
Hassan Faraji Baghtash ◽  
Rasoul Pakdel
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Process Variations ◽  
High Gain ◽  
Biomedical Signal Processing ◽  
Noise Power ◽  
Well Performance ◽  
Subthreshold Region ◽  
Rail To Rail ◽  
Unity Gain

low-voltage, low-power, rail-to-rail, two-stage trans-conductance amplifier is presented. The structure exploits body-driven transistors, configured in folded-cascode structure. To reduce the power consumption, the transistors are biased in the subthreshold region. The Specter RF simulation results which are conducted in TSMC 180nm CMOS standard process proves the well-performance of the proposed structure. The performance of the proposed structure against process variations is checked through process corners and Monte Carlo simulations. The results prove the robustness of the proposed amplifier against process uncertainties. Some important specifications of the design derived from circuit simulations are 93.36 dB small-signal gain, 14.4 PV2/Hz input referred noise power, 26.5 kHz unity gain frequency, 20 V/ms slew rate. The proposed structure draws 260 nW power from 0.5 V power supply and is loaded with a 15 pF loading capacitor. The input common mode range of structure is from 0 to 0.5 V.

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