Low-cost, Low-noise Vref Design for High-speed DDR Memory Modules

2006 ◽  
Author(s):  
Yutaka Uematsu ◽  
Eiichi Suzuki ◽  
Hideki Osaka ◽  
Yoji Nishio ◽  
Susumu Hatano
Keyword(s):  
High Speed ◽  
Low Cost ◽  
Low Noise ◽  
Memory Modules

scholarly journals Low-cost infrared sensor for wildlife detection in vegetation

2017 ◽  
Vol 63 (Special Issue) ◽  
pp. S13-S17
Author(s):  
Lev Jakub ◽  
Shapoval Vadym ◽  
Bartoška Jan ◽  
Kumhála František
Keyword(s):  
High Speed ◽  
High Probability ◽  
Low Cost ◽  
Low Noise ◽  
Infrared Sensor ◽  
Direct Sunlight ◽  
Infrared Technology ◽  
Wildlife Detection ◽  
Infrared Array ◽  
Very High

The protection of wild animals from mutilation or being killed during haymaking is still a serious problem connected with high working speeds and widths of modern harvesting machines. That is why the main aim of this study was to test low-cost, high-speed and low-noise infrared array sensor Melexis MLX90621 for the application of wildlife detection with the potential to be used in front of the mower equipment. The tests with two different crops with or without a hidden dog were made. Results showed that the sensor is able to detect an animal hidden in the crop with very high probability. Nevertheless, direct sunlight conditions can cause the problems when using infrared technology. A simultaneous use of other sensors working on different principle than infrared technology can be thus recommended.

Bipolar device technology challenge and opportunity

1985 ◽  
Vol 63 (6) ◽  
pp. 683-692 ◽  
Author(s):  
H. D. Barber
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Low Cost ◽  
Chemical Vapor ◽  
Low Noise ◽  
Isolation Techniques ◽  
Propagation Delays ◽  
Technological Barriers ◽  
On Chip ◽  
Bipolar Device

Silicon bipolar device technologies provided 65% of the world's integrated circuits in 1983. Where low noise, high current, low or high voltage, high speed or low cost are required, bipolar technologies are used. This paper will review the present status of bipolar device technologies, which make possible 100-ps gate-propagation delays, 150-μm2 gate areas, 1-GHz bandwidth amplifiers, on-chip control of over 1-A, 350-V operation, 14-GHz fT's and 10-ns. analogue-to-8-bit digital conversion. These devices are realized because of advances in isolation techniques, chemical-vapor deposition, photolithography, diffusion, ion implantation, conductor–contact interconnection technology, etching processes, and materials preparation. This paper will discuss some of the fundamental problems, modelling difficulties, and technological barriers that will impact the future development of bipolar integrated circuits.

scholarly journals Non-Linear Mathematical Modelling for Phase Locked Loop

2018 ◽  
Vol 7 (4.10) ◽  
pp. 81
Author(s):  
Prithiviraj R ◽  
Selvakumar J
Keyword(s):  
High Speed ◽  
Linear Models ◽  
Low Cost ◽  
Phase Error ◽  
Phase Locked Loop ◽  
Cmos Technology ◽  
Low Noise ◽  
Voltage Controlled Oscillator ◽  
Loop Filter ◽  
Non Linear

Design of Phase Locked Loop (PLL) plays a vital role in transceiver field. Phase Locked Loop comprises of three blocks, namely Phase and frequency detector, loop filter and voltage-controlled oscillator. The greater advancements in CMOS technology such as high frequency, high speed, low noise and phase error leads to low-cost PLL This work aims to develop higher order non-linear models of general Phase Locked Loop. The condition of stability and choice of loop filter is also determined. Based on the analysis, the transfer function for PLL is determined.  

Hardware efficient receiver for low-cost ultra-high rate 60 GHz wireless communications

2011 ◽  
Vol 3 (2) ◽  
pp. 121-129 ◽  
Author(s):  
Ahmet Çağrı Ulusoy ◽  
Gang Liu ◽  
Andreas Trasser ◽  
Hermann Schumacher
Keyword(s):  
Communication Systems ◽  
High Speed ◽  
Low Cost ◽  
Intermediate Frequency ◽  
Low Noise ◽  
High Rate ◽  
Low Noise Amplifiers ◽  
Range Data ◽  
60 Ghz ◽  
5 Ghz

This paper presents a hardware efficient receiver architecture, to be used in low-cost, ultra-high rate 60 GHz wireless communication systems. The receiver utilizes a simple, feed-forward carrier recovery concept, performing phase and frequency synchronization in the analog domain. This enables 1-bit baseband processing without a need of ultra-high speed and high precision analog-to-digital conversion, offering a strong simplification of the system architecture and comparatively low power consumption. In a first prototype implementation, the receiver is realized in a low-cost SiGe technology as two separate ICs: the 60 GHz/5 GHz downconverter, and the intermediate frequency synchronous demodulator. The simple synchronous reception concept is experimentally validated for up to 3.5 Gbit/s data rate, which constituted the limit of the existing experimental setup. Furthermore, the downconverter demonstrates that low-cost technologies (fop/fmax ~ 0.75) can be used to realize short-range data links at 60 GHz, with low-noise amplifiers in a more performant technology as needed.

scholarly journals A 1GHz Low-cost, Ultra Low-noise Preamplifier

2020 ◽  
Vol 11 ◽  
pp. 120-126
Author(s):  
J. Chatzakis ◽  
S. Hassan ◽  
E. Clark ◽  
M. Tatarakis
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Low Cost ◽  
Low Noise ◽  
Silicon Photomultipliers ◽  
Low Frequencies ◽  
Measurement Systems ◽  
Speed Measurement ◽  
Ultra Low Noise ◽  
Low Noise Preamplifier

A high quality, compact 1GHz preamplifier suitable for operation in conjunction with micro channelplates (MCP) and silicon Photomultipliers (SiPM), that is comprised of two integrated circuits is described inthis paper. The amplifier requires no adjustment and has a flat response from low frequencies and adequatebandwidth for high speed measurement systems.

scholarly journals HDL Modelling of Low-CostMemory Fault Detection Tester

2020 ◽  
Vol 2 (2) ◽  
pp. 17-23
Author(s):  
Quek Wei Chun ◽  
Pang Wai Leong ◽  
Chan Kah Yoong ◽  
Lee It Ee ◽  
Chung Gwo Chin
Keyword(s):  
Fault Detection ◽  
Production Rate ◽  
Integrated Circuit ◽  
High Speed ◽  
Low Cost ◽  
Memory Test ◽  
Test Sequence ◽  
Detection Algorithms ◽  
Memory Modules ◽  
Major Fault

Memory modules are widely used in varies kind of electronics system design. The capacity of the memory modules has increased rapidly since the past few years in order to satisfy the high demand from the end-users. The memory modules’ manufacturers demand more units of automatic test equipment (ATE)to increase the production rate. However, the existing ATE used in the industry to carry out the memory testing is too costly(at least a million dollars per ATE tester). The low-cost memory testers are urgently needed to increase the production rate of the memory module. This has in spired us to design a low-cost memory tester. A low-cost memory fault detection tester with all the major fault detection algorithms that used in industry is modelled using Very High Speed Integrated Circuit Hardware Description Language (VHDL) in this paper to support the need of the low-cost ATE memory tester. The fault detection algorithms modelled are MATS+ (Modified Algorithm Test Sequence), MATS++, March C, March C-, March X ,March Y, zero-one and checkerboard scan tests. PERL program is used to analyse the simulation results and a log file will be generated at the end of the memory test. Extensive simulation and experimental test results show that the memory tester modelled covers all the memory test algorithms used in the industry. The low-cost memory fault detection tester designed provides the 100% fault detection coverage for all memory defects.

Transmission Electron Microscopy of oriented Co84Cr14Ta2 thin films for longitudinal magnetic recording

1991 ◽  
Vol 49 ◽  
pp. 756-757
Author(s):  
T. P. Nolan
Keyword(s):  
Thin Film ◽  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Low Cost ◽  
Low Noise ◽  
Information Storage ◽  
High Coercivity ◽  
Magnetic Alloy ◽  
Magnetic Media ◽  
Transmission Electron

Thin film magnetic media are being used as low cost, high density forms of information storage. The development of this technology requires the study, at the sub-micron level, of morphological, crystallographic, and magnetic properties, throughout the depth of the deposited films. As the microstructure becomes increasingly fine, widi grain sizes approaching 100Å, the unique characterization capabilities of transmission electron microscopy (TEM) have become indispensable to the analysis of such thin film magnetic media.Films were deposited at 225°C, on two NiP plated Al substrates, one polished, and one circumferentially textured with a mean roughness of 55Å. Three layers, a 750Å chromium underlayer, a 600Å layer of magnetic alloy of composition Co84Cr14Ta2, and a 300Å amorphous carbon overcoat were then sputter deposited using a dc magnetron system at a power of 1kW, in a chamber evacuated below 10-6 torr and filled to 12μm Ar pressure. The textured medium is presently used in industry owing to its high coercivity, Hc, and relatively low noise. One important feature is that the coercivity in the circumferential read/write direction is significandy higher than that in the radial direction.

Development and production experience of the multilayer curtain-coated linerboard of Ji’an PM No. 3,

TAPPI Journal ◽  
2014 ◽  
Vol 13 (2) ◽  
pp. 17-25
Author(s):  
JUNMING SHU ◽  
ARTHAS YANG ◽  
PEKKA SALMINEN ◽  
HENRI VAITTINEN
Keyword(s):  
Titanium Dioxide ◽  
High Speed ◽  
Food Packaging ◽  
Production Efficiency ◽  
Positive Impact ◽  
Low Cost ◽  
Board Structure ◽  
Flexographic Printing ◽  
Curtain Coating ◽  
Coating Formulations

The Ji’an PM No. 3 is the first linerboard machine in China to use multilayer curtain coating technology. Since successful startup at the end of 2011, further development has been carried out to optimize running conditions, coating formulations, and the base paper to provide a product with satisfactory quality and lower cost to manufacture. The key challenges include designing the base board structure for the desired mechanical strength, designing the surface properties for subsequent coating operations, optimizing the high-speed running of the curtain coater to enhance production efficiency, minimizing the amount of titanium dioxide in the coating color, and balancing the coated board properties to make them suitable for both offset and flexographic printing. The pilot and mill scale results show that curtain coating has a major positive impact on brightness, while smoothness is improved mainly by the blade coating and calendering conditions. Optimization of base board properties and the blade + curtain + blade concept has resulted in the successful use of 100% recycled fiber to produce base board. The optical, mechanical, and printability properties of the final coated board meet market requirements for both offset and flexographic printing. Machine runnability is excellent at the current speed of 1000 m/min, and titanium dioxide has been eliminated in the coating formulations without affecting the coating coverage. A significant improvement in the total cost of coated white liner production has been achieved, compared to the conventional concept of using virgin fiber in the top ply. Future development will focus on combining low cost with further quality improvements to make linerboard suitable for a wider range of end-use applications, including frozen-food packaging and folding boxboard.

Low-Cost High-Speed Techniques for Real-Time Simulation of Power Electronic Systems

2007 ◽  
Author(s):  
R. E. Crosbie ◽  
J. J. Zenor ◽  
R. Bednar ◽  
D. Word ◽  
N. G. Hingorani
Keyword(s):  
Real Time ◽  
High Speed ◽  
Low Cost ◽  
Electronic Systems ◽  
Power Electronic ◽  
Real Time Simulation ◽  
Time Simulation

High-speed electro-optic switch using buried electrode structure in polymer Mach–Zehnder waveguide

2016 ◽  
Vol 30 (06) ◽  
pp. 1650063 ◽  
Author(s):  
Jingwen Sun ◽  
Jian Sun ◽  
Yunji Yi ◽  
Lucheng Qv ◽  
Shiqi Sun ◽  
...  
Keyword(s):  
Insertion Loss ◽  
Rise Time ◽  
High Speed ◽  
Low Cost ◽  
Characteristic Parameters ◽  
Electrode Structure ◽  
Processing Cost ◽  
Electro Optic ◽  
Disperse Red 1 ◽  
Excellent Photostability

A low-cost and high-speed electro-optic (EO) switch using the guest–host EO material Disperse Red 1/Polymethyl Methacrylate (DR1/PMMA) was designed and fabricated. The DR1/PMMA material presented a low processing cost, an excellent photostability and a large EO coefficient of 13.1 pm/V. To improve the performance of the switch, the in-plane buried electrode structure was introduced in the polymer Mach–Zehnder waveguide to improve the poling and modulating efficiency. The characteristic parameters of the waveguide and the electrodes were carefully designed and the fabrication process was strictly controlled. Under 1550 nm, the insertion loss of the device was 12.7 dB. The measured switching rise time and fall time of the switch were 50.00 ns and 54.29 ns, respectively.

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