A low phase noise, high figure of merit, 3.1 GHz–3.5 GHz ring oscillator using edge injection technique

2017 ◽  
Author(s):  
Khalil Yousef
Keyword(s):  
Phase Noise ◽  
Figure Of Merit ◽  
Ring Oscillator ◽  
Injection Technique ◽  
High Figure ◽  
Low Phase Noise

A LOW-PHASE-NOISE CMOS VCO FOR K-BAND APPLICATION

2013 ◽  
Vol 22 (06) ◽  
pp. 1350040
Author(s):  
MEI-LING YEH ◽  
YAO-CHIAN LIN ◽  
CHUNG-CHENG CHANG
Keyword(s):  
Phase Noise ◽  
Figure Of Merit ◽  
Cmos Technology ◽  
Voltage Controlled Oscillator ◽  
Chip Size ◽  
High Figure ◽  
Low Phase Noise ◽  
Capacitive Feedback ◽  
Measured Phase ◽  
K Band

A new high figure-of-merit (FOM) and low-phase-noise 20.73-GHz voltage-controlled oscillator is designed for K-band applications in this paper. The capacitive feedback technique is used for the low-phase-noise VCO design. The VCO can be tuned from 20.817 GHz to 20.266 GHz. The measured phase noise is -115.57 dBc/Hz at 1 MHz offset from the carrier frequency. The corresponding FOM is calculated to be -190 dBc/Hz. The VCO is implemented with the TSMC 0.18 μm one-poly-six-metal 1.7 V mixed-signal/RF CMOS technology, and the chip size is 0.51 × 0.74 mm2.

A low-phase-noise ring oscillator with coarse and fine tuning in a standard CMOS process

2012 ◽  
Vol 33 (7) ◽  
pp. 075004 ◽  
Author(s):  
Haijun Gao ◽  
Lingling Sun ◽  
Xiaofei Kuang ◽  
Liheng Lou
Keyword(s):  
Phase Noise ◽  
Fine Tuning ◽  
Ring Oscillator ◽  
Cmos Process ◽  
Standard Cmos Process ◽  
Low Phase Noise

scholarly journals Design of Low Power and Low Phase Noise Current Starved Ring Oscillator for RFID Tag EEPROM

2019 ◽  
pp. 19-23
Keyword(s):  
Low Power ◽  
Phase Noise ◽  
Power Dissipation ◽  
Supply Voltage ◽  
Ring Oscillator ◽  
Cmos Process ◽  
Clock Signal ◽  
Voltage Level ◽  
Rfid Tag ◽  
Low Phase Noise

Power dissipation of CMOS IC is a key factor in low power applications especially in RFID tag memories. Generally, tag memories like electrically erasable programmable read-only memory (EEPROM) require an internal clock generator to regulate the internal voltage level properly. In EEPROM, oscillator circuit can generate any periodic clock signal for frequency translation. Among different types of oscillators, a current starved ring oscillator (CSRO) is described in this research due to its very low current biasing source, which in turn restrict the current flows to reduce the overall power dissipation. The designed CSRO is limited to three stages to reduce the power dissipation to meet the specs. The simulated output shows that, the improved CSRO dissipates only 4.9 mW under the power supply voltage (VDD) 1.2 V in Silterra 130 nm CMOS process. Moreover, this designed oscillator has the lowest phase noise -119.38 dBc/Hz compared to other research works. In addition, the designed CSRO is able to reduce the overall chip area, which is only 0.00114 mm2. Therefore, this proposed low power and low phase noise CSRO will be able to regulate the voltage level successfully for low power RFID tag EEPROM.

Sign in / Sign up

Export Citation Format

Share Document