Advanced Four-Mask Process Bottom-Gate Poly-Si TFT via Self-Aligned NiSi2Seed-Induced Lateral Crystallization

ABSTRACT In this paper, the electrical properties of bottom-gate (BG) polycrystalline silicon (poly-Si) thin-film transistors (TFTs) by NiSi2 seed-induced lateral crystallization (SILC) and its applications are presented. Sequential lateral solidification (SLS), which is one of crystallization methods, is known to have poor electrical properties of TFTs with BG structures due to problems induced by laser. Therefore, the laser method cannot be used to well-developed production line of amorphous-Si (a-Si) TFT, resulting in large initial investment cost to change fabrication procedures. On the other hand, the BG poly-Si TFT by SILC (SILC-BGPS TFT) has basically compatible process flows with that of the a-Si TFT. The SILC-BGPS TFT exhibited threshold voltage of -3.9 V, steep subthreshold slope of 130 mV/dec, a high field-effect mobility of 129 cm2/Vs , and I on /I off ratio of ∼106.

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Formation of Large, Orientation-Controlled, Nearly Single Crystalline Si Thin Films on SiO2 Using Contact Printing of Rolled and Annealed Nickel Tapes

MRS Proceedings ◽

10.1557/proc-762-a17.13 ◽

2003 ◽

Vol 762 ◽

Author(s):

Hwang Huh ◽

Jung H. Shin

Keyword(s):

Electron Microscopy ◽

Thin Films ◽

High Resolution ◽

Amorphous Silicon ◽

Tem Analysis ◽

Contact Printing ◽

Single Crystalline ◽

High Resolution Tem ◽

Lateral Crystallization ◽

Si Films

AbstractAmorphous silicon (a-Si) films prepared on oxidized silicon wafer were crystallized to a highly textured form using contact printing of rolled and annealed nickel tapes. Crystallization was achieved by first annealing the a-Si film in contact with patterned Ni tape at 600°C for 20 min in a flowing forming gas (90 % N2, 10 % H2) environment, then removing the Ni tape and further annealing the a-Si film in vacuum for2hrsat600°C. An array of crystalline regions with diameters of up to 20 μm could be formed. Electron microscopy indicates that the regions are essentially single-crystalline except for the presence of twins and/or type A-B formations, and that all regions have the same orientation in all 3 directions even when separated by more than hundreds of microns. High resolution TEM analysis shows that formation of such orientation-controlled, nearly single crystalline regions is due to formation of nearly single crystalline NiSi2 under the point of contact, which then acts as the template for silicide-induced lateral crystallization. Furthermore, the orientation relationship between Si grains and Ni tape is observed to be Si (110) || Ni (001)

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Transition mechanism of the thin Si-films obtained by the CW laser lateral crystallization from the grain-boundary free highly {100} oriented crystal to the twinned {211} crystal depending on the laser power

Japanese Journal of Applied Physics ◽

10.7567/1347-4065/aaffbd ◽

2019 ◽

Vol 58 (SB) ◽

pp. SBBJ02 ◽

Cited By ~ 2

Author(s):

Nobuo Sasaki ◽

Muhammad Arif ◽

Yukiharu Uraoka

Keyword(s):

Grain Boundary ◽

Laser Power ◽

Oriented Crystal ◽

Transition Mechanism ◽

Cw Laser ◽

Lateral Crystallization ◽

Si Films

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Modeling and Simulation Study of Reduced Self-Heating in Bottom-Gate β-Ga2O3 MISFETs with a h-BN Gate Insulator

Journal of the Korean Physical Society ◽

10.3938/jkps.74.1171 ◽

2019 ◽

Vol 74 (12) ◽

pp. 1171-1175

Author(s):

Sangwook Jo ◽

Geonwook Yoo ◽

Junseok Heo

Keyword(s):

Modeling And Simulation ◽

Simulation Study ◽

Gate Insulator ◽

Self Heating ◽

Bottom Gate

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Analysis of Threshold Voltage Shift for Full VGS/VDS/Oxygen-Content Span under Positive Bias Stress in Bottom-Gate Amorphous InGaZnO Thin-Film Transistors

Micromachines ◽

10.3390/mi12030327 ◽

2021 ◽

Vol 12 (3) ◽

pp. 327

Author(s):

Je-Hyuk Kim ◽

Jun Tae Jang ◽

Jong-Ho Bae ◽

Sung-Jin Choi ◽

Dong Myong Kim ◽

...

Keyword(s):

Thin Film ◽

Electric Field ◽

Oxygen Content ◽

Threshold Voltage ◽

Thin Film Transistors ◽

Electron Trapping ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Drain Side ◽

Bottom Gate

In this study, we analyzed the threshold voltage shift characteristics of bottom-gate amorphous indium-gallium-zinc-oxide (IGZO) thin-film transistors (TFTs) under a wide range of positive stress voltages. We investigated four mechanisms: electron trapping at the gate insulator layer by a vertical electric field, electron trapping at the drain-side GI layer by hot-carrier injection, hole trapping at the source-side etch-stop layer by impact ionization, and donor-like state creation in the drain-side IGZO layer by a lateral electric field. To accurately analyze each mechanism, the local threshold voltages of the source and drain sides were measured by forward and reverse read-out. By using contour maps of the threshold voltage shift, we investigated which mechanism was dominant in various gate and drain stress voltage pairs. In addition, we investigated the effect of the oxygen content of the IGZO layer on the positive stress-induced threshold voltage shift. For oxygen-rich devices and oxygen-poor devices, the threshold voltage shift as well as the change in the density of states were analyzed.

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Investigation and Fabrication of Bottom Gate ZnO:Al TTFTs with Various Thicknesses of ZnO Buffer Layers

ECS Transactions ◽

10.1149/1.3377095 ◽

2019 ◽

Vol 28 (4) ◽

pp. 21-26

Author(s):

Yung-Hao Lin ◽

Hsin-Ying Lee ◽

Ching-Ting Lee

Keyword(s):

Buffer Layers ◽

Bottom Gate

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