scholarly journals Liquid-Cooled Heat Sink Optimization for Thermal Imbalance Mitigation in Wide-Bandgap Power Modules

2021 ◽  
Author(s):  
Raj Sahu ◽  
Emre Gurpinar ◽  
Burak Ozpineci
Author(s):  
Raj Sahu ◽  
Emre Gurpinar ◽  
Burak Ozpineci

Abstract Power semiconductor die placement on substrates used in high-power modules is generally optimized to minimize electrical parasitic (e.g., stray inductance, common-mode capacitance), taking into account the minimum spacing between semiconductor dies for thermal decoupling. The layout assumes sufficient heat spreading and transfer from dies to the cooling structure. Insulated metal substrate-based power module designs may lead to asymmetrical thermal resistance across the dies, which may cause significant temperature differences among the devices. Such unintentional thermal asymmetries can lead to over sizing the cooling system design or under-using the semiconductor power processing capability. This article proposes a thermal imbalance mitigation method that uses evolutionary optimized liquid-cooled heat sinks to improve the thermal loading among devices.


2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000402-000406
Author(s):  
B. Passmore ◽  
J. Hornberger ◽  
B. McPherson ◽  
J. Bourne ◽  
R. Shaw ◽  
...  

A high temperature, high performance power module was developed for extreme environment systems and applications to exploit the advantages of wide bandgap semiconductors. These power modules are rated > 1200V, > 100A, > 250 °C, and are designed to house any SiC or GaN device. Characterization data of this power module housing trench MOSFETs is presented which demonstrates an on-state current of 1500 A for a full-bridge switch position. In addition, switching waveforms are presented that exhibit fast transition times.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000359-000364 ◽  
Author(s):  
Adam Morgan ◽  
Ankan De ◽  
Haotao Ke ◽  
Xin Zhao ◽  
Kasunaidu Vechalapu ◽  
...  

The main motivation of this work is to design, fabricate, test, and compare an alternative, robust packaging approach for a power semiconductor current switch. Packaging a high voltage power semiconductor current switch into a single power module, compared to using separate power modules, offers cost, performance, and reliability advantages. With the advent of Wide-Bandgap (WBG) semiconductors, such as Silicon-Carbide, singular power electronic devices, where a device is denoted as a single transistor or rectifier unit on a chip, can now operate beyond 10kV–15kV levels and switch at frequencies within the kHz range. The improved voltage blocking capability reduces the number of series connected devices within the circuit, but challenges power module designers to create packages capable of managing the electrical, mechanical, and thermal stresses produced during operation. The non-sinusoidal nature of this stress punctuated with extremely fast changes in voltage and current, with respect to time, leads to non-ideal electrical and thermal performance. An optimized power semiconductor series current switch is fabricated using an IGBT (6500V/25A die) and SiC JBS Diode (6000V/10A), packaged into a 3D printed housing, to create a composite series current switch package (CSCSP). The final chosen device configuration was simulated and verified in an ANSYS software package. Also, the thermal behavior of such a composite package was simulated and verified using COMSOL. The simulated results were then compared with empirically obtained data, in order to ensure that the thermal ratings of the power devices were not exceeded; directly affecting the maximum attainable frequency of operation for the CSCSP. Both power semiconductor series current switch designs are tested and characterized under hard switching conditions. Special attention is given to ensure the voltage stress across the devices is significantly reduced.


Energies ◽  
2020 ◽  
Vol 13 (8) ◽  
pp. 2022 ◽  
Author(s):  
Maryam Mesgarpour Tousi ◽  
Mona Ghassemi

Our previous studies showed that geometrical techniques including (1) metal layer offset, (2) stacked substrate design and (3) protruding substrate, either individually or combined, cannot solve high electric field issues in high voltage high-density wide bandgap (WBG) power modules. Then, for the first time, we showed that a combination of the aforementioned geometrical methods and the application of a nonlinear field-dependent conductivity (FDC) layer could address the issue. Simulations were done under a 50 Hz sinusoidal AC voltage per IEC 61287-1. However, in practice, the insulation materials of the envisaged WBG power modules will be under square wave voltage pulses with a frequency of up to a few tens of kHz and temperatures up to a few hundred degrees. The relative permittivity and electrical conductivity of aluminum nitride (AlN) ceramic, silicone gel, and nonlinear FDC materials that were assumed to be constant in our previous studies, may be frequency- and temperature-dependent, and their dependency should be considered in the model. This is the case for other papers dealing with electric field calculation within power electronics modules, where the permittivity and AC electrical conductivity of the encapsulant and ceramic substrate materials are assumed at room temperature and for a 50 or 60 Hz AC sinusoidal voltage. Thus, the big question that remains unanswered is whether or not electric field simulations are valid for high temperature and high-frequency conditions. In this paper, this technical gap is addressed where a frequency- and temperature-dependent finite element method (FEM) model of the insulation system envisaged for a 6.5 kV high-density WBG power module will be developed in COMSOL Multiphysics, where a protruding substrate combined with the application of a nonlinear FDC layer is considered to address the high field issue. By using this model, the influence of frequency and temperature on the effectiveness of the proposed electric field reduction method is studied.


2019 ◽  
Vol 87 (2) ◽  
pp. 20903 ◽  
Author(s):  
Hélène Hourdequin ◽  
Lionel Laudebat ◽  
Marie-Laure Locatelli ◽  
Zarel Valdez-Nava ◽  
Pierre Bidan

As the available wide bandgap semiconductors continuingly increase their operating voltages, the electrical insulation used in their packaging is increasingly constrained. More precisely the ceramic substrate, used in demanding applications, represents a key multi-functional element is being in charge of the mechanical support of the metallic track that interconnects the semiconductor chips with the rest of the power system, as well as of electrical insulation and of thermal conduction. In this complex assembly, the electric field enhancement at the triple junction between the ceramic, the metallic track borders and the insulating environment is usually a critical point. When the electrical field at the triple point exceeds the critical value allowed by the insulation system, this hampers the device performance and limits the voltage rating for future systems. The solution proposed here is based on the shape modification of the ceramic substrate by creating a mesa structure (plateau) that holds the metallic tracks in the assembly. A numerical simulation approach is used to optimize the structure. After the elaboration of the structures by ultrasonic machining we observed a significant increase (30%) in the partial discharge detection voltages, at 10 pC sensitivity, in a substrate with a mesa structure when comparing to a conventional metallized ceramic substrate.


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