Board Level Drop Impact—Fundamental and Parametric Analysis

2005 ◽  
Vol 127 (4) ◽  
pp. 496-502 ◽  
Author(s):  
E. H. Wong ◽  
Y-W Mai ◽  
S. K. W. Seah
Keyword(s):  
Static Analysis ◽  
Bending Moment ◽  
Drop Impact ◽  
Computational Effort ◽  
Temperature Cycling ◽  
Mass System ◽  
Pcb Assembly ◽  
Impact Reliability ◽  
Board Level ◽  
Ic Package

A fundamental understanding of the dynamics of the PCB assembly when subjected to a half-sine acceleration has also been obtained through analyzing the PCB as a spring mass system, a beam, and a plate, respectively. The magnitude of stresses in solder interconnection due to flexing of the PCB is two orders higher than the magnitude of the stresses induced by acceleration and inertia loading the IC package. By ignoring the inertia loading, computational effort to evaluate the interconnection stresses due to PCB flexing can be reduced significantly via a two-step dynamic-static analysis. The dynamic analysis is first performed to evaluate the PCB bending moment adjacent the package, and is followed by a static analysis where the PCB bending moment is applied around the package. Parametric studies performed suggest a fundamental difference in designing for drop impact and designing for temperature cycling. The well-known design rules for temperature cycling—minimizing package length and maximizing interconnection standoff—does not work for drop impact. Instead, drop impact reliability can be enhanced by increasing the interconnection diameter, reducing the modulus of the interconnection materials, reducing the span of the PCB, or using either a very thin or a very thick PCB.

Dynamics Of Board-Level Drop Impact

2004 ◽  
Vol 127 (3) ◽  
pp. 200-207 ◽  
Author(s):  
E. H. Wong
Keyword(s):  
Printed Circuit Board ◽  
Time Integration ◽  
Bending Moment ◽  
Drop Impact ◽  
Circuit Board ◽  
Implicit Time ◽  
Element Analysis ◽  
Mass System ◽  
Acceleration Pulse ◽  
Board Level

The dynamic response of the printed circuit board (PCB) in a standard board-level drop impact test has been modeled as a spring-mass system, a beam, and a plate. Analytical solutions for the time-response and amplification of the deflection, bending moment, and acceleration at any point on the PCB have been developed and validated with finite element analysis. The analyses have shown that (i) the response of the PCB was dominated by the fundamental mode and (ii) the response of the PCB depends heavily on the ratio between the frequency of the PCB and the input acceleration pulse. The bending moment on the PCB has been shown beyond doubt to be responsible for the interconnection stress; the maximum moment on the PCB can be most effectively reduced through reducing the PCB thickness. The rapid receding of the higher modes in the moment response suggests that it can be adequately and effectively modeled using the standard implicit time-integration code.

Viscoelastic Influence on Dynamic Properties of PCB Under Drop Impact

2007 ◽  
Vol 129 (3) ◽  
pp. 266-272 ◽  
Author(s):  
Fang Liu ◽  
Guang Meng ◽  
Mei Zhao
Keyword(s):  
Printed Circuit Board ◽  
Dynamic Properties ◽  
Substrate Material ◽  
Drop Impact ◽  
Circuit Board ◽  
Theoretical Research ◽  
Reliability Design ◽  
Pcb Assembly ◽  
Impact Reliability ◽  
Board Level

Dynamic properties of printed circuit board (PCB) assembly under drop impact are investigated when viscoelasticity of substrate materials is considered. The main materials of a PCB substrate are macromolecule resins, which are typical viscoelastic materials. From the viewpoint of viscoelasticity, the dynamics of PCBs under drop impact is analyzed based on mass-damping-spring, beam, and plate theories. It is demonstrated that the viscoelasticity of a PCB has distinct influences on the dynamic properties of PCBs under board-level drop impact. When there is an increase in the viscosity of substrate materials, the damping coefficients of PCBs would rise, its deflection and acceleration responses could diminish faster, and the maximum deflection of PCBs would become smaller. Meanwhile, with the same viscosity and drop impact conditions, a larger plate would produce a bigger deflection response. Therefore, drop impact reliability could be enhanced by choosing substrate material of larger viscoelasticity and reducing properly the size of PCBs. Dynamic analysis of PCBs under drop impact not only contributes to perfecting theoretical research, but also provides a reference for the choice of substrate materials and reliability design of PCBs when electronic products are devised.

Board-Level Drop Impact Reliability of Silicon Interposer-Based 2.5-D IC Integration

2016 ◽  
Vol 6 (10) ◽  
pp. 1493-1504 ◽  
Author(s):  
Hsien-Chie Cheng ◽  
Tzu-Hsuan Cheng ◽  
Wen-Hwa Chen ◽  
Tao-Chih Chang ◽  
Hsin-Yi Huang
Keyword(s):  
Drop Impact ◽  
Impact Reliability ◽  
Board Level

Drop impact reliability testing for lead-free and lead-based soldered IC packages

2006 ◽  
Vol 46 (7) ◽  
pp. 1160-1171 ◽  
Author(s):  
Desmond Y.R. Chong ◽  
F.X. Che ◽  
John H.L. Pang ◽  
Kellin Ng ◽  
Jane Y.N. Tan ◽  
...  
Keyword(s):  
Drop Impact ◽  
Lead Free ◽  
Reliability Testing ◽  
Impact Reliability

Correlating Drop Impact Simulations With Drop Impact Testing Using High-Speed Camera Measurements

2009 ◽  
Vol 131 (1) ◽  
Author(s):  
J. J. M. Zaal ◽  
W. D. van Driel ◽  
F. J. H. G. Kessels ◽  
G. Q. Zhang
Keyword(s):  
High Speed ◽  
Simulation Models ◽  
3D Models ◽  
Drop Impact ◽  
Impact Testing ◽  
Navigation Systems ◽  
High Speed Camera ◽  
Impact Performance ◽  
Impact Simulations ◽  
Board Level

The increased use of mobile appliances such as mobile phones and navigation systems in today’s society has resulted in an increase in reliability issues related to drop performance. Mobile appliances are dropped several times during their lifespan and the product is required to survive common drop accidents. A widely accepted method to assess the drop reliability of microelectronics on board-level is the drop impact test. This test has been standardized by international councils such as Joint Electron Device Engineering Council and is widely adopted throughout the industry. In this research the solder loading is investigated by combining high-speed camera measurements of several drop impact tests with verified finite element models. These simulation models are developed in order to gain an insight on the loading pattern of solder joints based on interconnect layout, drop conditions, and product specifications prior to physical prototyping. Deflections and frequencies during drop testing are measured using a high-speed camera setup. The high-speed camera experiments are performed on two levels: machine level (rebounds with and without a catcher) and product level (with different levels of energy and different pulse times). Parametric (dynamic and quasistatic) 3D models are developed to predict the drop impact performance. The experimental results are used to verify and enhance the simulation models, e.g., by tuning the damping parameters. As a result, the verified models can be used to determine the location of the critical solder joint and to obtain estimates of the solder lifetime performance.

Mechanical and Thermal Board Level Reliability Comparison Between Electroless Ni Im. Au and Solder on Pad Surface Finishes for Large Flip Chip BGA Packages

2006 ◽  
Author(s):  
Gnyaneshwar Ramakrishna ◽  
Donghyun Kim ◽  
Mudasir Ahamad ◽  
Lavanya Gopalakrishnan ◽  
Mason Hu ◽  
...  
Keyword(s):  
Surface Finish ◽  
Flip Chip ◽  
High Reliability ◽  
Electroless Nickel ◽  
Temperature Cycling ◽  
Design Parameters ◽  
Temperature Cycle ◽  
Bga Packages ◽  
Reliability And Robustness ◽  
Board Level

Large Flip Chip BGA (FCBGA) packages are needed in high pin out applications (>1800), e.g., ASIC's and are typically used in high reliability and robustness applications. Hence understanding the package reliability and robustness becomes one of paramount importance for efficient product design. There are various aspects to the package that need to be understood, to ensure an effective design. The focus of this paper is to understand the BGA reliability of the package with particular reference to comparison of the surface finish, vis-a`-vis, between Electroless Nickel Immersion Gold (ENIG) and Solder On Pad (SOP) on the substrate side of the package, which are the typical solutions for large plastic FC-BGA packages. Tests, which include board level temperature cycling, monotonic bend and shock testing have been conducted to compare the two surface finish options. The results of these tests demonstrate that the mechanical strength of the interface exceeds by a factor of two for the SOP surface finish, while BGA design parameters play a key role in ensuring comparative temperature cycle reliability in comparison with ENIG packages.

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